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参数资料
| 型号： | AD7741BRZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 9/12页 |
| 文件大小： | 0K |
| 描述： | IC CONVERTER VOLT TO FREQ 8SOIC |
| 标准包装： | 1,000 |
| 类型： | 电压至频率 |
| 频率 - 最大： | 3.072MHz |
| 全量程： | ±50ppm/°C |
| 线性： | ±0.012% |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SO |
| 包装： | 带卷 (TR) |
| 配用： | EVAL-AD7741/42EBZ-ND - BOARD EVAL FOR AD7741/7742 |
AD7741/AD7742
The digital data that represents the analog input voltage is con-
tained in the duty cycle of the pulse train appearing at the out-
put of the comparator. The output is a fixed-width pulse whose
frequency depends on the analog input signal. The input voltage
is offset internally so that a full-scale input gives an output fre-
quency of 0.45 f CLKIN and zero-scale input gives an output fre-
quency of 0.05 f CLKIN . The output allows simple interfacing to
either standard logic families or opto-couplers. The clock high
AD7741/AD7742
5M
TO OTHER
CIRCUITRY
period controls the pulsewidth of the frequency output. The
pulse is initiated by the edge of the clock signal. The delay time
between the edge of the clock and the edge of the frequency
CLKIN
C1
CLKOUT
C2
output is typically 9 ns. Figure 7 shows the waveform of this
frequency output.
After power-up, or if there is a step change in input voltage,
there is a settling time that must elapse before valid data is
obtained. This is typically 2 CLKIN cycles on the AD7742 and
10 CLKIN cycles on the AD7741.
f CLKIN
f OUT = f CLKIN /4
V IN = V REF /2
f OUT = f CLKIN /10
V IN = V REF /8
f OUT = f CLKIN *3/20
V IN = V REF /4
Figure 8. On-Chip Oscillator
The on-chip oscillator circuit also has a start-up time associated
with it before it oscillates at its correct frequency and correct
voltage levels. The typical start-up time for the circuit is 5 ms
(with a 6.144 MHz crystal).
The AD7741/AD7742 master clock appears on the CLKOUT
pin of the device. The maximum recommended load on this pin
is one CMOS load. When using a crystal to generate the AD7741/
AD7742 clock it may be desirable to then use this clock as the
clock source for the system. In this case it is recommended that
the CLKOUT signal be buffered with a CMOS buffer before
being applied to the rest of the circuit.
Reference Input
The AD7741/AD7742 performs conversion relative to an applied
reference voltage that allows easy interfacing to ratiometric
systems. This reference may be applied using the internal 2.5 V
6 T CLK
7 T CLK
bandgap reference. For the AD7741, this is done by simply
leaving REFIN/OUT unconnected. For the AD7742, REFIN is
AVERAGE f OUT IS f CLKIN *3/20 BUT THE ACTUAL PULSE STREAM
VARIES BETWEEN f CLKIN /6 AND f CLKIN /7
Figure 7. AD7741/AD7742 Frequency Output Waveforms
Clock Generation
As distinct from the asynchronous VFCs which rely on the stability
of an external capacitor to set their full-scale frequency, the
AD7741/AD7742 uses an external clock to define the full-scale
output frequency. The result is a more stable, more linear trans-
fer function and also allows the designer to determine the sys-
tem stability and drift based upon the external clock selected. A
crystal oscillator may also be used if desired.
The AD7741/AD7742 requires a master clock input, which may
be an external CMOS-compatible clock signal applied to the
CLKIN pin (CLKOUT not used). Alternatively, a crystal of the
correct frequency can be connected between CLKIN and
CLKOUT, when the clock circuit will function as a crystal
controlled oscillator. Figure 8 shows a simple model of the on-
chip oscillator.
REV. 0
–9 –
tied to REFOUT. Alternatively, an external reference, e.g.,
REF192 or AD780, may be used. For the AD7741, this is con-
nected to REFIN/OUT and will overdrive the internal refer-
ence. For the AD7742, it is connected directly to the REFIN
pin.
While the internal reference will be adequate for most applica-
tions, power supply rejection and overall regulation may be
improved through the use of an external precision reference.
The process of selecting an external voltage reference should
include consideration of drive capability, initial error, noise and
drift characteristics. A suitable choice would be the AD780 or
REF192.
Power-Down Mode
The low power standby mode is initiated by taking the PD pin
low, which shuts down most of the analog and digital circuitry.
This reduces the power consumption to 185 μ W max.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD7741YR | 制造商:Analog Devices 功能描述:VFC Sync 1.35MHz 8-Pin SOIC N |
| AD7741YR-REEL | 功能描述:IC CONVERTER V TO FREQ 8-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - V/F 和 F/V 转换器 系列:- 标准包装:1 系列:- 类型:频率至电压 频率 - 最大:10kHz 全量程:- 线性:±0.3% 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:Digi-Reel® 其它名称:LM2917MX-8/NOPBDKR |
| AD7741YR-REEL7 | 功能描述:IC CONVERTER V TO FREQ 8-SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - V/F 和 F/V 转换器 系列:- 标准包装:1 系列:- 类型:频率至电压 频率 - 最大:10kHz 全量程:- 线性:±0.3% 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:Digi-Reel® 其它名称:LM2917MX-8/NOPBDKR |
| AD7741YRZ | 功能描述:IC CONVERTER VOLT TO FREQ 8SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - V/F 和 F/V 转换器 系列:- 标准包装:1 系列:- 类型:频率至电压 频率 - 最大:10kHz 全量程:- 线性:±0.3% 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:Digi-Reel® 其它名称:LM2917MX-8/NOPBDKR |
| AD7742 | 制造商:AD 制造商全称:Analog Devices 功能描述:Single and Multichannel, Synchronous Voltage-to-Frequency Converters |
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