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参数资料
| 型号： | AD7805BRZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 26/28页 |
| 文件大小： | 0K |
| 描述： | IC DAC 10BIT QUAD PARALL 28-SOIC |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 标准包装： | 1,000 |
| 设置时间： | 1.5µs |
| 位数： | 10 |
| 数据接口： | 并联 |
| 转换器数目： | 4 |
| 电压电源： | 模拟和数字 |
| 功率耗散（最大）： | 66mW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 28-SOIC W |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 8 电压，双极 |
| 采样率（每秒）： | 667k |
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AD7804/AD7805/AD7808/AD7809
–7–
REV. A
AD7804/AD7808 PIN FUNCTION DESCRIPTION
AD7804
AD7808
Pin No.
Mnemonic
Description
1
1, 6
AGND
Ground reference point for analog circuitry.
2, 3
VOUTB, VOUTA
Analog output voltage from the DACs.
4
REFOUT
Reference Output. This is a bandgap reference and is typically 1.23 V.
5
PD
Active low input used to put the part into low power mode reducing current consumption
to 1
A.
7, 8
VOUTF, VOUTE
Analog output voltages from the DACs.
59
FSIN
Level-triggered control input (active low). This is the frame synchronization signal for the
input data. When
FSIN goes low, it enables the input shift register and data is transferred
on the falling edges of CLKIN.
610
LDAC
LDAC Input. When this digital input is taken low, all DAC registers are simultaneously
updated with the contents of the data registers. If
LDAC is tied permanently low, or is
low on the sixteenth falling clock edge with timing similar to that of SDIN, an automatic
update will take place.
7
11
SDIN
Serial Data Input. These devices accept a 16-bit word. Data is clocked into the input shift
register on the falling edge of CLKIN.
8
12
DGND
Ground reference point for digital circuitry.
913
DVDD
Digital Power Supply.
10
14
CLKIN
Clock Input. Data is clocked into the input shift register on the falling edges of CLKIN.
Duty Cycle should be between 40% and 60%.
11
15
CLR
Asynchronous
CLR Input. When this input is taken low, all Main DAC outputs are
cleared either to VBIAS or to VBIAS/16 volts. All Sub DACs are also cleared and thus the
transfer function of the Main DAC will remain centered around the VBIAS point.
16
NC
No Connect. This pin should be left open circuit.
17, 18
VOUTH, VOUTG
Analog output voltages from the DACs.
12
20
REFIN
This is an external reference input for the DACs. When this reference is selected for a
DAC in the control register, the analog output from the selected DAC swings around this
point.
13
21
COMP
Compensation Pin. This pin provides an output from the internal VDD/2 divider and is
provided for ac bypass purposes only. This pin should be decoupled with 1 nF capacitors
to both AVDD and AGND. This pin can be overdriven with an external reference, thus
giving the facility for two external references on the part.
14, 15
22, 23
VOUTD, VOUTC
Analog output voltage from the DACs.
16
19, 24
AVDD
Analog Power Supply. +3.3 V to +5 V.
AD7804 PIN CONFIGURATION
TOP VIEW
(Not to Scale)
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
AGND
VOUTB
VOUTA
REFOUT
FSIN
LDAC
SDIN
DGND
AVDD
VOUTC
VOUTD
COMP
REFIN
CLR
CLKIN
DVDD
AD7804
AD7808 PIN CONFIGURATION
TOP VIEW
(Not to Scale)
24
23
22
21
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
9
10
11
12
AD7808
NC = NO CONNECT
DGND
SDIN
LDAC
FSIN
VOUTE
AGND
VOUTB
VOUTA
REFOUT
VOUTF
AGND
PD
DVDD
CLKIN
CLR
NC
VOUTH
AVDD
VOUTC
VOUTD
COMP
VOUTG
AVDD
REFIN
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| AD7805CR | 功能描述:IC DAC 10BIT QUAD PARALL 28-SOIC RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:- 产品培训模块:Data Converter Fundamentals DAC Architectures 标准包装:750 系列:- 设置时间:7µs 位数:16 数据接口:并联 转换器数目:1 电压电源:双 ± 功率耗散（最大）:100mW 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:28-LCC（J 形引线） 供应商设备封装:28-PLCC（11.51x11.51） 包装:带卷 (TR) 输出数目和类型:1 电压，单极；1 电压，双极 采样率（每秒）:143k |
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