参数资料
型号: AD783JQ
厂商: Analog Devices Inc
文件页数: 7/8页
文件大小: 0K
描述: IC AMP SAMPLE HOLD LP 5MA 8CDIP
标准包装: 1
放大器类型: 采样和保持
电路数: 1
-3db带宽: 15MHz
电流 - 输入偏压: 100nA
电流 - 电源: 9.5mA
电流 - 输出 / 通道: 5mA
电压 - 电源,单路/双路(±): ±4.75 V ~ 5.25 V
工作温度: 0°C ~ 70°C
安装类型: 通孔
封装/外壳: 8-CDIP(0.300",7.62mm)
供应商设备封装: 8-CERDIP
包装: 管件
AD783
REV. A
–7–
The AD783 does not provide separate analog and digital ground
leads as is the case with most A-to-D converters. The common
pin is the single ground terminal for the device. It is the refer-
ence point for the sampled input voltage and the held output
voltage and also the digital ground return path. The common
pin should be connected to the reference (analog) ground of the
A-to-D converter with a separate ground lead. Since the analog
and digital grounds in the AD783 are connected internally, the
common pin should also be connected to the digital ground,
which is usually tied to analog common at the A-to-D converter.
Figure 3 illustrates the recommended decoupling and grounding
practice.
NOISE CHARACTERISTICS
Designers of data conversion circuits must also consider the
effect of noise sources on the accuracy of the data acquisition
system. A sample-and-hold amplifier that precedes the A-to-D
converter introduces some noise and represents another source
of uncertainty in the conversion process. The noise from the
AD783 is specified as the total output noise, which includes
both the sampled wideband noise of the SHA in addition to the
band limited output noise. The total output noise is the rms
sum of the sampled dc uncertainty and the hold mode noise. A
plot of the total output noise vs. the equivalent input bandwidth
of the converter being used is given in Figure 4.
300
0
1k
10M
200
100
10k
1M
100k
FREQUENCY – Hz
OUTPUT
NOISE
V
rms
Figure 4. RMS Noise vs. Input Bandwidth of ADC
DRIVING THE ANALOG INPUTS
For best performance, it is important to drive the AD783 analog
input from a low impedance signal source. This enhances the
sampling accuracy by minimizing the analog and digital cross-
talk. Signals which come from higher impedance sources (e.g.,
over 5 k
) will have a relatively higher level of crosstalk. For
applications where signals have high source impedance, an
operational amplifier buffer in front of the AD783 is required.
The AD711 (precision BiFET op amp) is recommended for
these applications.
HIGH FREQUENCY SAMPLING
Aperture jitter and distortion are the primary factors which limit
frequency domain performance of a sample-and-hold amplifier.
Aperture jitter modulates the phase of the hold command and
produces an effective noise on the sampled analog input. The
magnitude of the jitter induced noise is directly related to the
frequency of the input signal.
A graph showing the magnitude of the jitter induced error vs.
frequency of the input signal is given in Figure 5.
The accuracy in sampling high frequency signals is also
constrained by the distortion and noise created by the
sample-and-hold. The level of distortion increases with
frequency and reduces the “effective number of bits” of the
conversion.
Measurements of Figures 6 and 7 were made using a 14-bit
A/D converter with VIN = 5 V p-p and a sample frequency of
100 kSPS.
1%
1k
1M
0.1%
0.01%
10k
100k
FREQUENCY – Hz
APERTURE JITTER TYPICAL AT 20ps
1/2 BIT @
8 BITS
1/2 BIT @
10 BITS
1/2 BIT @
12 BITS
1/2 BIT @
14 BITS
Figure 5. Error Magnitude vs. Frequency
–65
–95
1M
–80
–90
1k
–85
100
–70
–75
100k
10k
FREQUENCY – Hz
THD
dB
Figure 6. Total Harmonic Distortion vs. Frequency
90
0
1M
20
10
10k
1k
30
40
50
60
70
80
100k
FREQUENCY – Hz
S/(N
+
D)
dB
Figure 7. Signal/(Noise and Distortion) vs. Frequency
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