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| 型号： | AD7894AR-10 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 6/12页 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT SRL T/H LP 8-SOIC |
| 标准包装： | 1 |
| 位数： | 14 |
| 采样率（每秒）： | 200k |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 27.5mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 管件 |
| 输入数目和类型： | 1 个单端，双极 |
–3–
REV. 0
AD7894
Parameter
A Versions
l
B Versions
1
Units
Test Conditions/Comments
POWER REQUIREMENTS
VDD
+5
V nom
±5% for Specified Performance
IDD
5.5
mA max
Digital Inputs @ VDD, VDD = 5 V ± 5%
Power Dissipation
27.5
mW max
Typically 20 mW
Power-Down Mode
IDD @ TMIN to TMAX
20
A max
Digital Inputs @ GND, VDD = 5 V ± 5%
Power Dissipation TMIN to TMAX
100
W max
Typ 15
W
NOTES
1Temperature ranges are as follows: A, B Versions: –40
°C to +85°C.
2Applies to Mode 1 operation. See Operating Modes section.
3See Terminology.
4Sample tested @ +25
°C to ensure compliance.
5This 10
s includes the “wake-up” time from standby. This “wake-up” time is timed from the rising edge of CONVST, whereas conversion is timed from the falling
edge of
CONVST, for narrow CONVST pulsewidth the conversion time is effectively the “wake-up” time plus conversion time, hence 10
s. This can be seen from
Figure 3. Note that if the
CONVST pulsewidth is greater than 5
s, the effective conversion time will increase beyond 10 s.
Specifications subject to change without notice.
TIMING CHARACTERISTICS
1, 2
Parameter
A, B Versions
Units
Test Conditions/Comments
t1
40
ns min
CONVST Pulsewidth
t2
31.25
2
ns min
SCLK High Pulsewidth
t3
31.25
2
ns min
SCLK Low Pulsewidth
t4
60
3
ns max
Data Access Time after Falling Edge of SCLK
VDD = 5 V ± 5%
t5
10
ns min
Data Hold Time after Falling Edge of SCLK
t6
20
4
ns max
Bus Relinquish Time after Falling Edge of SCLK
NOTES
1Sample tested at +25
°C to ensure compliance. All input signals are measured with tr = tf = 1 ns (10% to 90% of +5 V) and timed from a voltage level of +1.6 V.
2The SCLK maximum frequency is 16 MHz. Care must be taken when interfacing to account for the data access time, t
4, and the setup time required for the user’s
processor. These two times will determine the maximum SCLK frequency with which the user’s system can operate. See Serial Interface section for more information.
3Measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.0 V.
4Derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapolated back
to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t 6, quoted in the timing characteristics is the true bus relinquish time
of the part and as such is independent of external bus loading capacitances.
Specifications subject to change without notice.
(VDD = +5 V
5%, GND = 0 V, REF IN = +2.5 V)
ABSOLUTE MAXIMUM RATINGS*
(TA = +25
°C unless otherwise noted)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Analog Input Voltage to GND
AD7894-10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±17 V
AD7894-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±7 V
AD7894-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . –5 V to +10 V
Reference Input Voltage to GND . . . . –0.3 V to VDD + 0.3 V
Digital Input Voltage to GND . . . . . . . –0.3 V to VDD + 0.3 V
Digital Output Voltage to GND . . . . . –0.3 V to VDD + 0.3 V
Operating Temperature Range
Commercial (A, B Versions) . . . . . . . . . . .
–40
°C to +85°C
Storage Temperature Range . . . . . . . . . . . –65
°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150
°C
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW
θ
JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . .
170
°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . +215
°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +220
°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7894 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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