参数资料
型号: AD7912ARMZ
厂商: Analog Devices Inc
文件页数: 16/32页
文件大小: 0K
描述: IC ADC 10BIT DUAL 2CH 8MSOP
标准包装: 50
位数: 10
采样率(每秒): 1M
数据接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 20mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-TSSOP,8-MSOP(0.118",3.00mm 宽)
供应商设备封装: 8-MSOP
包装: 管件
输入数目和类型: 2 个单端,单极
配用: EVAL-AD7912CBZ-ND - BOARD EVALUATION FOR AD7912
AD7912/AD7922
Rev. 0 | Page 23 of 32
04351-0-031
SCLK
CS
DOUT
DON'T CARE
VALID DATA ADC2
VALID DATA ADC1
DON'T CARE
NORMAL MODE
CONVERSION ON THE
TWO DEVICES
NORMAL MODE
CONVERSION ON THE
TWO DEVICES
CHANGE MODE
CS HIGH
BETWEEN THE
10TH–12TH SCLK
FALLING EDGE
DAISY-CHAIN MODE
DATA IS SHIFTED
FROM ONE ADC TO
THE NEXT ONE
DAISY-CHAIN MODE
DATA IS SHIFTED
FROM ONE ADC TO
THE NEXT ONE
DIN
DON'T CARE
CH
STY
CH
STY
DON'T CARE
THE DATA WILL BE
EVENTUALLY LOST,
COMMAND3
SET CHANNEL
FOR ADC2,
COMMAND2
SET CHANNEL
FOR ADC1,
COMMAND1
CHANGE MODE
CS HIGH BETWEEN THE
10TH–13TH SCLK
FALLING EDGE
KEEP THE DEVICES IN
DAISY-CHAIN MODE
Figure 34. Daisy-Chain Diagrams—1
04351-0-032
NORMAL CONVERSION
DAISY-CHAIN CYCLE
THE PARTS ENTER
DAISY-CHAIN MODE
1
16
1
10
1
10
12
14
16
SCLK
CS
DIN
DOUT
DOUT1
(DIN2)*
12
DON'T CARE
COMMAND3 WITH CHN
STY
0, 0, CHN = MOD, VALID DATA ADC1
(0, 0, CHN = STY, VALID DATA ADC1)
DON'T CARE
0, 0, CHN
MOD, VALID DATA ADC1
(0, 0, CHN
STY, VALID DATA ADC1)
0, 0, CHN = MOD, VALID DATA ADC2
DON'T CARE
0, 0, CHN
MOD, VALID DATA ADC2
NOTE
*INFORMATION IN BRACKETS CORRESPONDS TO DATA CLOCKED INTO DIN2 PIN
SCLK
CS
DIN
DOUT
DOUT1
(DIN2)*
COMMAND2 WITH CHN
STY
COMMAND1
DON'T CARE
COMMAND3
COMMAND2
0, 0, CHN = MOD, VALID DATA ADC1
(0, 0, CHN = STY, VALID DATA ADC1)
0, 0, CHN
MOD, VALID DATA ADC1
COMMAND3
0, 0, CHN = MOD, VALID DATA ADC2
DAISY-CHAIN CYCLE
NORMAL CONVERSION
THE PARTS ENTER
NORMAL MODE
1
10
121416
1
10
13
1
16
SHIFTED INTO THE ADC1 INTERNAL REGISTER,
THIS DATA WILL BE EVENTUALLY LOST
SHIFTED INTO THE ADC2
INTERNAL REGISTER
SHIFTED INTO THE ADC1
INTERNAL REGISTER
SHIFTED INTO THE ADC1 INTERNAL REGISTER, IT
CONTAINS CHANNEL FOR NEXT CONVERSION ON ADC1
SHIFTED INTO THE ADC2
INTERNAL REGISTER
SHIFTED INTO THE ADC2 INTERNAL REGISTER, IT
CONTAINS CHANNEL FOR NEXT CONVERSION ON ADC2
Figure 35. Daisy-Chain Diagrams—II
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