参数资料
型号: AD7939BCPZ
厂商: Analog Devices Inc
文件页数: 5/36页
文件大小: 0K
描述: IC ADC 10BIT 8CH PARALL 32LFCSP
标准包装: 1
位数: 10
采样率(每秒): 1.5M
数据接口: 并联
转换器数目: 1
功率耗散(最大): 13.5mW
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘,CSP
供应商设备封装: 32-LFCSP-VQ
包装: 托盘
输入数目和类型: 8 个单端,单极;4 个差分,单极;4 个伪差分,单极;7 伪差分,单极
配用: EVAL-AD7939CBZ-ND - BOARD EVALUATION FOR AD7939CBZ
Data Sheet
AD7938/AD7939
Rev. C | Page 13 of 36
TERMINOLOGY
Integral Nonlinearity
This is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function. The
endpoints of the transfer function are zero scale, 1 LSB below
the first code transition, and full scale, 1 LSB above the last code
transition.
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
This is the deviation of the first code transition (00…000) to
(00…001) from the ideal (that is, AGND + 1 LSB).
Offset Error Match
This is the difference in offset error between any two channels.
Gain Error
This is the deviation of the last code transition (111…110) to
(111…111) from the ideal (that is, VREF 1 LSB) after the offset
error has been adjusted out.
Gain Error Match
This is the difference in gain error between any two channels.
Zero-Code Error
This applies when using the twos complement output coding
option, in particular to the 2 × VREF input range with VREF to
+VREF biased about the VREFIN point. It is the deviation of the
midscale transition (all 0s to all 1s) from the ideal VIN voltage
(that is, VREF).
Zero-Code Error Match
This is the difference in zero-code error between any two
channels.
Positive Gain Error
This applies when using the twos complement output coding
option, in particular to the 2 × VREF input range with VREF to
+VREF biased about the VREFIN point. It is the deviation of the last
code transition (011…110) to (011…111) from the ideal (that
is, VREF 1 LSB) after the zero-code error has been adjusted out.
Positive Gain Error Match
This is the difference in positive gain error between any two
channels.
Negative Gain Error
This applies when using the twos complement output coding
option, in particular to the 2 × VREF input range with VREF to
+VREF biased about the VREF point. It is the deviation of the first
code transition (100…000) to (100…001) from the ideal (that is,
VREFIN + 1 LSB) after the zero-code error has been adjusted out.
Negative Gain Error Match
This is the difference in negative gain error between any two
channels.
Channel-to-Channel Isolation
Channel-to-channel isolation is a measure of the level of
crosstalk between channels. It is measured by applying a full-
scale sine wave signal to all seven nonselected input channels
and applying a 50 kHz signal to the selected channel. The
channel-to-channel isolation is defined as the ratio of the power
of the 50 kHz signal on the selected channel to the power of the
noise signal on the unselected channels that appears in the FFT
of this channel. The noise frequency on the unselected channels
varies from 40 kHz to 740 kHz. The noise amplitude is at 2 × VREF,
while the signal amplitude is at 1 × VREF. See Figure 5.
Power Supply Rejection Ratio (PSRR)
PSRR is defined as the ratio of the power in the ADC output at
full-scale frequency, f, to the power of a 100 mV p-p sine wave
applied to the ADC VDD supply of frequency, fS. The frequency
of the noise varies from 1 kHz to 1 MHz.
PSRR (dB) = 10 log(Pf/PfS)
where:
Pf is the power at frequency f in the ADC output.
PfS is the power at frequency fS in the ADC output.
Common-Mode Rejection Ratio (CMRR)
CMRR is defined as the ratio of the power in the ADC output at
full-scale frequency, f, to the power of a 100 mV p-p sine wave
applied to the common-mode voltage of VIN+ and VIN of
frequency, fS.
CMRR (dB) = 10 log(Pf/PfS)
where:
Pf is the power at frequency f in the ADC output.
PfS is the power at frequency fS in the ADC output.
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