
14-Bit, 1 MSPS, Differential,
Programmable Input PulSAR ADC
Data Sheet
Rev. A
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FEATURES
Multiple pins/software-programmable input ranges
+5 V (10 V p-p), +10 V (20 V p-p), ±5 V (20 V p-p),
±10 V (40 V p-p)
Pins or serial SPI-compatible input ranges/mode selection
Throughput
1 MSPS (warp mode)
800 kSPS (normal mode)
670 kSPS (impulse mode)
14-bit resolution with no missing codes
INL: ±0.3 LSB typical, ±1 LSB maximum (±61 ppm of FSR)
SNR: 85 dB @ 2 kHz
iCMOS process technology
5 V internal reference: typical drift 3 ppm/°C; TEMP output
No pipeline delay (SAR architecture)
Parallel (14- or 8-bit bus) and serial 5 V/3.3 V interface
SPI-/QSPI-/MICROWIRE-/DSP-compatible
Power dissipation
235 mW @ 1 MSPS
10 mW @ 1 kSPS
48-lead LQFP and 48-lead LFCSP (7 mm × 7 mm)
APPLICATIONS
Process controls
Medical instruments
High speed data acquisition
Digital signal processing
Instrumentation
Spectrum analysis
ATE
GENERAL DESCRIPTION
The AD7952 is a 14-bit, charge redistribution, successive
approximation register (SAR) architecture analog-to-digital
converter (ADC) fabricated on Analog Devices, Inc.’s iCMOS
high voltage process. The device is configured through hardware or
via a dedicated write-only serial configuration port for input
range and operating mode. The AD7952 contains a high speed
14-bit sampling ADC, an internal conversion clock, an internal
reference (and buffer), error correction circuits, and both serial
and parallel system interface ports. A falling edge on CNVST
samples the fully differential analog inputs on IN+ and IN.
The AD7952 features four different analog input ranges and three
different sampling modes: warp mode for the fastest throughput,
normal mode for the fastest asynchronous throughput, and
impulse mode where power is scaled with throughput.
Operation is specified from 40°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM
14
CONTROL LOGIC AND
CALIBRATION CIRCUITRY
CLOCK
AD7952
DGND
DVDD
AVDD
AGND
REF REFGND
IN+
PD
RESET
CNVST
PDBUF
REFBUFIN
PDREF
REF
TEMP
D[13:0]
BUSY
RD
CS
OB/2C
OGND
OVDD
BYTESWAP
SER/PAR
REF
AMP
SERIAL DATA
PORT
PARALLEL
INTERFACE
SWITCHED
CAP DAC
VCC VEE
WARP IMPULSE BIPOLAR TEN
SERIAL
CONFIGURATION
PORT
IN–
0
658
9-
0
01
Figure 1.
Table 1. 48-Lead PulSAR Selection
Input Type
Res
(Bits)
100 to
250
(kSPS)
500 to
570
(kSPS)
570 to
1000
(kSPS)
>1000
kSPS
Bipolar
14
Differential
Bipolar
14
AD7952
Unipolar
16
Bipolar
16
Differential
16
Unipolar
Simultaneous/
16
Multichannel
Unipolar
Differential
18
Unipolar
Differential
Bipolar
18