参数资料
型号: AD7988-1BCPZ-RL
厂商: Analog Devices Inc
文件页数: 10/24页
文件大小: 0K
描述: IC ADC 16BIT SRL 100KSPS 10LFCSP
标准包装: 5,000
系列: PulSAR®
位数: 16
采样率(每秒): 100k
数据接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
电压电源: 单电源
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 10-WFDFN 裸露焊盘,CSP
供应商设备封装: 10-LFCSP-WD(3x3)
包装: 带卷 (TR)
输入数目和类型: 1 个伪差分,单极
AD7988-1/AD7988-5
Data Sheet
Rev. D | Page 18 of 24
CS MODE, 3-WIRE
This mode is typically used when a single AD7988-x is
connected to an SPI-compatible digital host. The connection
diagram is shown in Figure 34, and the corresponding timing is
With SDI tied to VIO, a rising edge on CNV initiates a conver-
sion, selects the CS mode, and forces SDO to high impedance.
When the conversion is complete, the AD7988-x enters the
acquisition phase and powers down.
When CNV goes low, the MSB is output onto SDO. The remaining
data bits are then clocked by subsequent SCK falling edges. The
data is valid on both SCK edges. Although the rising edge can
be used to capture the data, a digital host using the SCK falling
edge allows a faster reading rate, provided that it has an acceptable
hold time. After the 16th SCK falling edge or when CNV goes
high, whichever is earlier, SDO returns to high impedance.
AD7988-1/
AD7988-5
SDO
DATA IN
DIGITAL HOST
CONVERT
CLK
VIO
CNV
SCK
SDI
10231-
035
Figure 34. 3-Wire CS Mode Connection Diagram
tCONV
tCYC
CNV
ACQUISITION
tACQ
tSCK
tSCKL
CONVERSION
SCK
SDO
D15
D14
D13
D1
D0
tEN
tHSDO
1
2
3
14
15
16
tDSDO
tDIS
tSCKH
tCNVH
SDI = 1
10231-
036
Figure 35. 3-Wire CS Mode Serial Interface Timing (SDI High)
相关PDF资料
PDF描述
AD7988-1BCPZ-RL7 IC ADC 16BIT SRL 100KSPS 10LFCSP
MS27497E12F8SB CONN RCPT 8POS WALL MNT W/SCKT
MS27468T11B35PD CONN RCPT 13POS JAM NUT W/PINS
MS27473E8A44SA CONN PLUG 4POS STRAIGHT W/SCKT
MS27467T11A35PA CONN PLUG 13POS STRAIGHT W/PINS
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