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参数资料
| 型号： | AD8003ACPZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 6/17页 |
| 文件大小： | 0K |
| 描述： | IC OPAMP CF TRPL LDIST 24LFCSP |
| 标准包装： | 1 |
| 放大器类型： | 电流反馈 |
| 电路数： | 3 |
| 转换速率： | 3800 V/µs |
| -3db带宽： | 1.65GHz |
| 电流 - 输入偏压： | 7µA |
| 电压 - 输入偏移： | 700µV |
| 电流 - 电源： | 9.5mA |
| 电流 - 输出 / 通道： | 100mA |
| 电压 - 电源，单路/双路(±)： | 4.5 V ~ 10 V，±2.25 V ~ 5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 24-LFCSP-VQ（4x4） |
| 包装： | 标准包装 |
| 产品目录页面： | 769 (CN2011-ZH PDF) |
| 配用： | EVAL-AD8003-3CPEZ-ND - BOARD EVALUATION AD8003-3CPEZ |
| 其它名称： | AD8003ACPZ-REEL7DKR |
Data Sheet
AD8003
Rev. C | Page 13 of 16
PRINTED CIRCUIT BOARD LAYOUT
Printed circuit board (PCB) layout is usually one of the last
steps in the design process and often proves to be one of the
most critical. A high performance design can be rendered
mediocre due to poor or sloppy layout. Because the AD8003 can
operate into the RF frequency spectrum, high frequency board
layout considerations must be taken into account. The PCB
layout, signal routing, power supply bypassing, and grounding
must all be addressed to ensure optimal performance.
LOW DISTORTION PINOUT
The AD8003 LFCSP features ADI’s low distortion pinout. The
pinout lowers the second harmonic distortion and simplifies the
circuit layout. The close proximity of the noninverting input
and the negative supply pin creates a source of second harmonic
distortion. Physical separation of the noninverting input pin
and the negative power supply pin reduces this distortion.
By providing an additional output pin, the feedback resistor
can be connected directly between the feedback pin and the
inverting input. This greatly simplifies the routing of the
feedback resistor and allows a more compact circuit layout,
which reduces its size and helps to minimize parasitics and
increase stability.
SIGNAL ROUTING
To minimize parasitic inductances, ground planes should be
used under high frequency signal traces. However, the ground
plane should be removed from under the input and output pins
to minimize the formation of parasitic capacitors, which degrades
phase margin. Signals that are susceptible to noise pickup should be
run on the internal layers of the PCB, which can provide
maximum shielding.
EXPOSED PADDLE
The AD8003 features an exposed paddle, which lowers the
thermal resistance by approximately 40% compared to a
standard SOIC plastic package. The paddle can be soldered
directly to the ground plane of the board. Thermal vias or heat
pipes can also be incorporated into the design of the mounting
pad for the exposed paddle. These additional vias improve the
thermal transfer from the package to the PCB. Using a heavier
weight copper also reduces the overall thermal resistance path
to ground.
POWER SUPPLY BYPASSING
Power supply bypassing is a critical aspect of the PCB design
process. For best performance, the AD8003 power supply pins
need to be properly bypassed.
Each amplifier has its own supply pins brought out for the utmost
flexibility. Supply pins can be commoned together or routed to a
dedicated power plane. Commoned supply connections can also
reduce the need for bypass capacitors on each supply line. The
exact number and values of the bypass capacitors are dictated
by the design specifications of the actual circuit.
A parallel combination of different value capacitors from each
of the power supply pins to ground tends to work the best.
Paralleling different values and sizes of capacitors helps to ensure
that the power supply pins see a low ac impedance across a wide
band of frequencies. This is important for minimizing the coupling
of noise into the amplifier. Starting directly at the power supply
pins, the smallest value and physical-sized component should
be placed on the same side of the board as the amplifier, and as
close as possible to the amplifier, and connected to the ground
plane. This process should be repeated for the next largest capacitor
value. It is recommended that a 0.1 F ceramic 0508 case be used
for the AD8003. The 0508 offers low series inductance and
excellent high frequency performance. The 0.1 F case provides
low impedance at high frequencies. A 10 F electrolytic capacitor
should be placed in parallel with the 0.1 F. The 10 F capacitor
provides low ac impedance at low frequencies. Smaller values
of electrolytic capacitors can be used depending on the circuit
requirements. Additional smaller value capacitors help provide a
low impedance path for unwanted noise out to higher
frequencies but are not always necessary.
Placement of the capacitor returns (grounds), where the capacitors
enter into the ground plane, is also important. Returning the
capacitor grounds close to the amplifier load is critical for
distortion performance. Keeping the capacitors distance short,
but equal from the load, is optimal for performance.
In some cases, bypassing between the two supplies can help
improve PSRR and maintain distortion performance in
crowded or difficult layouts. Designers should note this as
another option for improving performance.
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