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| 型号： | AD8008ARZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 19/21页 |
| 文件大小： | 0K |
| 描述： | IC OPAMP CF DUAL ULDIST LN 8SOIC |
| 标准包装： | 2,500 |
| 放大器类型： | 电流反馈 |
| 电路数： | 2 |
| 转换速率： | 1000 V/µs |
| -3db带宽： | 650MHz |
| 电流 - 输入偏压： | 4µA |
| 电压 - 输入偏移： | 500µV |
| 电流 - 电源： | 9mA |
| 电流 - 输出 / 通道： | 130mA |
| 电压 - 电源，单路/双路(±)： | 5 V ~ 12 V，±2.5 V ~ 6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SO |
| 包装： | 带卷 (TR) |
AD8007/AD8008
Rev. E | Page 6 of
20
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Rating
Supply Voltage
12.6 V
Power Dissipation
See Figure 5
Common-Mode Input Voltage
±VS
Differential Input Voltage
±1.0 V
Output Short-Circuit Duration
See Figure 5
Storage Temperature Range
65°C to +125°C
Operating Temperature Range
40°C to +85°C
Lead Temperature (Soldering, 10 sec)
300°C
RMS output voltages should be considered. If RL is referenced to
VS, as in single-supply operation, then the total drive power is
VS × IOUT.
If the rms signal levels are indeterminate, then consider the
worst case, when VOUT = VS/4 for RL to midsupply
L
S
D
R
V
I
V
P
2
4
)
(
+
×
=
In single-supply operation, with RL referenced to VS, worst case is
VOUT = VS/2.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Airflow increases heat dissipation, effectively reducing θJA. In
addition, more metal directly in contact with the package leads
from metal traces, through-holes, ground, and power planes
reduces the θJA. Care must be taken to minimize parasitic
capacitances at the input leads of high speed op amps, see the
Layout Considerations section.
Figure 5 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the SOIC-8 (125°C/W),
MSOP-8 (150°C/W), and SC70-5 (210°C/W) packages on a
JEDEC standard 4-layer board. θJA values are approximations.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8007/AD8008
packages is limited by the associated rise in junction temperature
(TJ) on the die. The plastic encapsulating the die locally reaches
the junction temperature. At approximately 150°C, which is the
glass transition temperature, the plastic changes its properties.
Even temporarily exceeding this temperature limit can change
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the AD8007/AD8008.
Exceeding a junction temperature of 175°C for an extended
time can result in changes in the silicon devices, potentially
causing failure.
AMBIENT TEMPERATURE (°C)
2.0
1.5
0
1
0
6
–
–40
MA
X
IMU
M
P
O
W
E
R
D
ISS
IP
A
TI
O
N
(
W
)
–20
0
20
40
60
80
1.0
0.5
SOIC-8
SC70-5
MSOP-8
0
28
66
-0
05
The still-air thermal properties of the package and PCB (θJA),
ambient temperature (TA), and the total power dissipated in the
package (PD) determine the junction temperature of the die.
The junction temperature can be calculated as
TJ = TA + (PD × θJA)
Figure 5. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (VS) times the
quiescent current (IS). Assuming the load (RL ) is referenced to
midsupply, the total drive power is VS/2 × IOUT, some of which is
dissipated in the package and some in the load (VOUT × IOUT).
The difference between the total drive power and the load
power is the drive power dissipated in the package.
OUTPUT SHORT CIRCUIT
Shorting the output to ground or drawing excessive current for
the AD8007/AD8008 will likely cause catastrophic failure.
ESD CAUTION
PD = Quiescent Power + (Total Drive Power Load Power)
L
OUT
L
OUT
S
D
R
V
R
V
I
V
P
2
)
(
×
+
×
=
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