参数资料
型号: AD8017AR
厂商: Analog Devices Inc
文件页数: 4/17页
文件大小: 0K
描述: IC AMP GP DUAL LP LDIST 8SOIC
标准包装: 98
放大器类型: 通用
电路数: 2
转换速率: 1600 V/µs
-3db带宽: 160MHz
电流 - 输入偏压: 16µA
电压 - 输入偏移: 1800µV
电流 - 电源: 7mA
电流 - 输出 / 通道: 270mA
电压 - 电源,单路/双路(±): 4.4 V ~ 12 V,±2.2 V ~ 6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
配用: AD8017AR-EVAL-ND - BOARD EVAL FOR AD8017
AD8017
–11–
REV. C
THEORY OF OPERATION
The AD8017 is a dual high speed CF amplifier that attains new
levels of bandwidth (BW), power, distortion and signal swing,
under heavy current loads. Its wide dynamic performance
(including noise) is the result of both a new complementary
high speed bipolar process and a new and unique architectural
design. The AD8017 basically uses a two gain stage comple-
mentary design approach versus the traditional “single stage”
complementary mirror structure sometimes referred to as the
Nelson amplifier. Though twin stages have been tried before,
they typically consumed high power since they were of a folded
cascode design much like the AD9617.
This design allows for the standing or quiescent current to add
to the high signal or slew current-induced stages. In the time
domain, the large signal output rise/fall time and slew rate is
typically controlled by the small signal BW of the amplifier and
the input signal step amplitude respectively, not the dc quies-
cent current of the gain stages (with the exception of input level
shift diodes Q1/Q2). Using two stages as opposed to one, also
allows for a higher overall gain bandwidth product (GBWP) for
the same power, thus providing lower signal distortion and the
ability to drive heavier external loads. In addition, the second
gain stage also isolates (divides down) A3’s input reflected load
drive and the nonlinearities created resulting in relatively lower
distortion and higher open-loop gain. See Figure 6.
Overall, when “high” external load drive and low ac distortion is
a requirement, a twin gain stage integrating amplifier like the
AD8017 will provide excellent results for low power over the
traditional single stage complementary devices. In addition,
being a CF amplifier, closed-loop BW variations versus external
gain variations (varying RG) will be much lower compared to a
VF op amp, where the BW varies inversely with gain. Another
key attribute of this amplifier is its ability to run on a single 5 V
supply due in part to its wide common-mode input and output
voltage range capability. For 5 V supply operation, the device
obviously consumes less than half the quiescent power (versus
12 V supply) with little degradation in its ac and dc performance
characteristics. See specification pages for comparisons.
DC GAIN CHARACTER
Gain stages A1/
A1 and A2/A2 combined provide negative feed-
forward transresistance gain. See Figure 6. Stage A3 is a unity
gain buffer which provides external load isolation to A2. Each
stage uses a symmetrical complementary design. (A3 is also
complementary, though not explicitly shown). This is done to
reduce both second order signal distortion and overall quiescent
power as discussed above. In the quasi dc-to-low frequency
region, the closed loop gain relationship can be approximated as:
G = 1+RF/RG for Noninverting Operation
G = –RF/RG for Inverting Operation
These basic relationships above are common to all traditional
operational amplifiers.
A1
IPN
IQ1
Q3
IPP
VP
+
Q1
Q2
Z1
Q4
INP
IPN
A1
VN
IR + IFC
IR – IFC
IQ1
IE
AD8017
–VI
CP1
–VI
CP1
–A2
CP2
ICQ + IO
VO9
–A3
A2
CD
Z1
ICQ – IO
RN
RF
Z2
RL
CL
VO
Z1 = R1 || C1
Z1
CD
Figure 6. Simplified Block Diagram
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