参数资料
型号: AD8074ARUZ
厂商: Analog Devices Inc
文件页数: 3/15页
文件大小: 0K
描述: IC BUFFER TRPL VIDEO HS 16-TSSOP
标准包装: 96
应用: 缓冲器
电路数: 3
-3db带宽: 600MHz
转换速率: 1600 V/µs
电流 - 电源: 21.5mA
电流 - 输出 / 通道: 70mA
电压 - 电源,单路/双路(±): 9 V ~ 11 V,±4.5 V ~ 5.5 V
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 16-TSSOP
包装: 管件
产品目录页面: 764 (CN2011-ZH PDF)
AD8074/AD8075
–11–
Triple Video Multiplexer
The AD8074 and AD8075 each have an output-enable function
that can be used to disable the outputs and put them in a high-
impedance state. Usually, for a unity-gain device, it is relatively
easy to provide high disabled impedance, because the feedback
path is from the output to a high-impedance input. However, for a
non-unity-gain part, the feedback provides a resistive path to
ground. This will usually dominate the disabled output imped-
ance, and make it a much lower value than the unity-gain device.
The AD8075 has an internal buffer that provides a low-impedance,
ground level output that terminates the feedback path during
enabled operation. In the disabled state, both this buffer output
and the amplifier output are disabled to a high impedance to
provide a high-impedance disabled state.
To construct a multiplexer, the outputs from one or more devices
are connected in parallel and only one device is enabled at a
time while all of the others are disabled. The two sets of inputs
are applied individually to each of the separate device inputs.
Figure 4 shows the circuit details for this function. The first RGB
Source 1 is input to the first AD8075. Each of the individual
signals is terminated to ground with 75
to provide proper
termination for the input cables. In a similar fashion, the Source
2 signals are input to the second AD8075.
0.1 F
–5V
0.1 F
–5V
0.1 F
–5V
+
25 F
0.1 F
+5V
0.1 F
+5V
0.1 F
+5V
+
25 F
AD8075
75
OE
75
R
G
B
SOURCE 2
0.1 F
–5V
0.1 F
–5V
0.1 F
–5V
+
25 F
0.1 F
+5V
0.1 F
+5V
0.1 F
+5V
+
25 F
AD8075
75
OE
75
R
G
B
SOURCE 1
SEL1/
SEL2
R
G
B
OUTPUT
Figure 4. Mux
Rev. B
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