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参数资料
| 型号： | AD8120ACPZ-R2 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 16/16页 |
| 文件大小： | 0K |
| 描述： | IC ANLG VIDEO DELAY LINE 32LFCSP |
| 标准包装： | 1 |
| 类型： | 视频延迟线 |
| 应用： | HD 视频 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-LFCSP-EP（5x5） |
| 包装： | 标准包装 |
| 其它名称： | AD8120ACPZ-R2DKR |
Data Sheet
AD8120
Rev. A | Page 9 of 16
THEORY OF OPERATION
The AD8120 is a triple, digitally controlled analog delay line,
optimized for correcting delay skew between individual channels
in common wired communication media such as unshielded
twisted pair (UTP), shielded twisted pair (STP), and coaxial
cables. In these applications, the AD8120 is used to time-align
three video signals, usually RGB or YPbPr, that arrive at a
receiver at different times due to variations in total delay per
channel. Although its primary application is analog video, the
AD8120 can be applied in other systems that require variable
analog delays up to 50 ns with 0.8 ns resolution.
The three channels consist of cascaded delay sections that are
switched in such a way as to provide a total of 50 ns total delay
difference between channels with 0.8 ns resolution. A fixed
propagation delay is common to all channels, where the associated
delay is set to 0. Therefore, the delay setting for a given channel is
a measure of the relative delay among the channels, rather than
an absolute delay.
There are three options for controlling the delay: serial periph-
eral interface (SPI) serial bus, I2C serial bus, and analog control
voltage. Two pins select the type of control: the MODE pin selects
analog or digital control, and the SER_SEL pin selects the SPI or
Table 5. Modes of Control
PD (Pin 5)
MODE (Pin 7)
SER_SEL (Pin 6)
Control Type
0
X
Power-down
1
0
I2C control
1
0
1
SPI control
1
X
Analog control
In analog control mode, three control voltages, VCR, VCG, and
VCB, control the delay of each channel. These voltages are
converted internally to digital codes with 0.8 ns steps.
Each AD8120 channel has a fixed overall gain of 2 and can
drive up to four double-terminated 75 cables or PCB traces.
A power-down feature can shut down the AD8120 for power
saving when not in use.
CONTROLLING THE DELAY
The delay time of each of the three channels is controlled in one
of three ways. One control option is the application of analog
control voltages to the VCR, VCG, and VCB inputs. The other two
control options are via the SPI or I2C serial digital bus. The delay
is set in discrete amounts with a nominal resolution of 0.8 ns per
quantization level (or LSB), even in the analog control mode.
A delay code is assigned to each quantization level, ranging from
0 to 63 in decimal format. The means of control (analog, SPI, or
I2C) is selected by applying the appropriate logic levels to the
MODE and SER_SEL inputs (see Table 5). All three channels
must use the same delay control option in a given application.
It is important to note that in skew correction applications, the
metric is the relative delay between channels, not the absolute
delay. Each channel of the AD8120 exhibits a constant delay at
its zero delay setting, referred to as its propagation delay. This
propagation delay is well matched between the channels and is
subtracted out when performing skew correction. The delay
codes, therefore, ignore the constant propagation delay and
refer only to adjustable delay beyond the propagation delay.
Delay can be calculated by multiplying the delay code by 0.8 ns.
For example, setting the red delay to 8 ns (delay code = 10), the
green delay to 16 ns (delay code = 20), and the blue delay to 28 ns
(delay code = 35) produces the following relative delays: green
delayed by 8 ns relative to red, blue delayed by 20 ns relative to
red, and blue delayed by 12 ns relative to green. If an application
requires control of absolute delay, the propagation delay must be
added to the delay corresponding to the associated delay code.
SETTING THE DELAY
In most video skew compensation applications, it is best to set
the delay of the path with the longest delay to 0, and then to add
delay to the other paths to match the longest delay. In this way,
the bandwidth of each path is maximized, and the noise of each
path is minimized. Figure 16 illustrates a case where a test step
is applied simultaneously to each cable input, and the green
cable delay is the longest.
RED CABLE OUTPUT
28ns
GREEN CABLE OUTPUT
BLUE CABLE OUTPUT
40ns
07838-
022
Figure 16. Cable Delay Example
In the example in Figure 16, the AD8120 green delay should be
set to 0. The AD8120 red delay is then set to the delay difference
between the green and red outputs, or 40 ns. Finally, the AD8120
blue delay is set to the delay difference between the green and blue
outputs, or 28 ns. Using the digital delay codes, green delay = 0,
red delay = 50, and blue delay = 35.
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