参数资料
型号: AD8150-EVAL
厂商: Analog Devices, Inc.
英文描述: 33 x 17, 1.5 Gbps Digital Crosspoint Switch
中文描述: 33 × 17,1.5 Gbps的数字交叉点开关
文件页数: 18/35页
文件大小: 995K
代理商: AD8150-EVAL
AD8150
–18–
REV. 0
V
CC
V
EE
DISABLE
I
OUT
OUTyyP
OUTyyN
V
CC
2V
V
EE
Figure 33. Simplified Output Circuit
To ensure proper operation, all outputs (including unused output)
must be pulled high using external pull-up networks to a level
within the output compliance range. If outputs from multiple
AD8150s are wired together, a single pull-up network may be
used for each output bus. The pull-up network should be chosen
to keep the output voltage levels within the output compliance
range at all times. Recommended pull-up networks to produce
PECL/ECL 100K and 10K compatible outputs are shown in
Figure 34. Alternatively, a separate supply can be used to pro-
vide V
COM
; making R
COM
and D
COM
unnecessary.
V
CC
R
COM
V
COM
R
L
OUTyyN
OUTyyP
AD8150
V
CC
D
COM
V
COM
R
L
OUTyyN
OUTyyP
AD8150
R
L
R
L
Figure 34. Output Pull-Up Networks: a) ECL 100K,
b) ECL 10K
The output levels are simply:
V
OH
=
V
COM
V
OL
=
V
COM
– I
OUT
R
L
V
SWING
= V
OH
– V
OL
= I
OUT
R
L
V
COM
=
V
CC
– I
OUT
R
COM
(
100K Mode
)
V
COM
=
V
CC
– V
(
D
COM
)
(
10K Mode
)
The common-mode adjustment element (R
COM
or D
COM
) may
be omitted if the input range of the receiver includes the positive
supply voltage. The bypass capacitors reduce common-mode
perturbations by providing an ac short from the common nodes
(V
COM
) to ground.
When busing together the outputs of multiple AD8150s or when
running at high data rates, double termination of its outputs is
recommended to mitigate the impact of reflections due to open
transmission line stubs and the lumped capacitance of the
AD8150 output pins. A possible connection is shown in Figure
35; the bypass capacitors provide an ac short from the common
nodes of the termination resistors to ground. To maintain signal
fidelity at high data rates, the stubs connecting the output pins
to the output transmission lines or load resistors should be as
short as possible.
V
CC
OUTyyN
OUTyyP
OUTyyN
OUTyyP
R
L
R
L
Z
O
Z
O
Z
O
Z
O
R
L
R
L
AD8150
AD8150
V
COM
R
COM
RECEIVER
Figure 35. Double Termination of AD8150 Outputs
In this case, the output levels are:
V
OH
=
V
COM
(1/4)
I
OUT
R
L
V
OL
=
V
COM
(3/4)
I
OUT
R
L
V
SWING
=
V
OH
V
OL
= (1/2)
I
OUT
R
L
Output Current Set Pin (REF)
A simplified schematic of the reference circuit is shown in Fig-
ure 36. A single external resistor connected between the REF
pin and V
EE
determines the output current for all output stages.
This feature allows a choice of pull-up networks and transmission
line characteristic impedances while still achieving a nominal
output swing of 800 mV. At low data rates, substantial power
savings can be achieved by using lower output swings and higher
load resistances.
AD8150
V
EE
R
SET
REF
V
CC
I
OUT
/25
1.25V
Figure 36. Simplified Reference Circuit
The resistor value current is given by the following expression:
R
I
SET
OUT
=
25
Example:
R
SET
= 1.54
k
for
I
OUT
= 16.2
mA
The minimum set resistor is R
SET,min
= 1 k
resulting in I
OUT,max
=
25 mA. The maximum set resistor is R
SET,max
= 5 k
result-
ing in I
OUT,min
= 5 mA. Nominal 800 mV output swings can be
achieved in a 50
load using R
SET
= 1.56 k
(I
OUT
= 16.2 mA)
or in a doubly-terminated 75
load using R
SET
= 1.17 k
(I
OUT
= 21.3 mA).
To minimize stray capacitance and avoid the pickup of unwanted
signals, the external set resistor should be located close to the
REF pin. Bypassing the set resistor is not recommended.
相关PDF资料
PDF描述
AD8150 33 x 17, 1.5 Gbps Digital Crosspoint Switch
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