参数资料
| 型号： | AD8175ABPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 27/40页 |
| 文件大小： | 0K |
| 描述： | IC CROSSPOINT SWITCH TRPL 676BGA |
| 标准包装： | 1 |
| 功能： | 交叉点开关 |
| 电路： | 3 x 16:9 |
| 电压电源： | 单/双电源 |
| 电压 - 电源，单路/双路(±)： | 4.5 V ~ 5.5 V，±2.5V |
| 电流 - 电源： | 600mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 676-BGA |
| 供应商设备封装： | 676-BGA（27x27） |
| 包装： | 管件 |
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Data Sheet
AD8175
Rev. B | Page 33 of 40
Power Dissipation
Calculation of Power Dissipation
06
4
78
-03
6
AMBIENT TEMPERATURE (°C)
MA
XI
M
U
M
PO
W
E
R
(W
)
3
4
5
6
7
8
9
10
15
25
35
45
55
65
75
85
TJ = 150°C
Figure 51. Maximum Die Power Dissipation vs. Ambient Temperature
The curve in Figure 51 was calculated from
JA
AMBIENT
MAX
JUNCTION
MAX
D
T
P
,
(1)
As an example, if the AD8175 is enclosed in an environment at
45 C (TA), the total on-chip dissipation under all load and
supply conditions must not be allowed to exceed 7.0 W.
When calculating on-chip power dissipation, it is necessary to
include the power dissipated in the output devices due to
current flowing in the loads. For a sinusoidal output about
ground and symmetrical split supplies, the on-chip power
dissipation due the load can be approximated by
RMS
OUTPUT
RMS
UTPUT
O
POS
OUTPUT
D
I
V
P
,
(2)
For nonsinusoidal output, the power dissipation should be
calculated by integrating the on-chip voltage drop across the
output devices multiplied by the load current over one period.
The user can subtract the quiescent current for the Class AB
output stage when calculating the loaded power dissipation. For
each output stage driving a load, subtract a quiescent power,
according to
QUIESCENT
OUTPUT
NEG
POS
OUTPUT
DQ
I
V
P
,
)
(
(3)
where IOUTPUT, QUIESCENT = 1.65 mA for each single-ended output
pin for the AD8175.
For each disabled RGB output channel, the quiescent power
supply current in VPOS and VNEG drops by approximately
34 mA.
QNPN
QPNP
VNEG
VPOS
VOUTPUT
IOUTPUT
IO, QUIESCENT
06
47
8-
02
5
Figure 52. Simplified Output Stage
Example
For the AD8175, with an ambient temperature of 85°C, all nine
RGB output channels driving 1 Vrms into 100 Ω loads, and
power supplies at ±2.5 V, follow these steps:
1.
Calculate power dissipation of AD8175 using data sheet
quiescent currents. Neglecting VDD current, as it is
insignificant.
VNEG
NEG
VPOS
POS
QUIESCENT
D
I
V
I
V
P
,
(4)
W
3
mA
600
V
5
.
2
mA
600
V
5
.
2
,
QUIESCENT
D
P
2.
Calculate power dissipation from loads. For a differential
output and ground-referenced load, the output power is
symmetrical in each output phase.
RMS
OUTPUT
RMS
OUTPUT
POS
OUTPUT
D
I
V
P
,
(5)
mW
15
Ω
100
/
V
1
V
1
V
5
.
2
,
OUTPUT
D
P
There are 27 output pairs, or 54 output currents.
W
81
.
0
mW
15
54
,
OUTPUT
D
nP
3.
Subtract quiescent output stage current for number of
loads (54 in this example). The output stage is either
standing or driving a load, but the current only needs to be
counted once (valid for output voltages > 0.5 V).
QUIESCENT
OUTPUT
NEG
POS
OUTPUT
DQ
I
V
P
,
(6)
mW
25
.
8
mA
65
.
1
V)
5
.
2
(
V
5
.
2
,
OUTPUT
DQ
P
There are 27 output pairs, or 54 output currents.
W
45
.
0
mW
25
.
8
54
,
OUTPUT
DQ
nP
4.
Verify that the power dissipation does not exceed the
maximum allowed value.
OUTPUT
DQ
OUTPUT
D
QUIESCENT
D
CHIP
ON
D
nP
P
,
(7)
W
36
.
3
W
45
.
0
W
81
.
0
W
3
,
CHIP
ON
D
P
From Figure 51 or Equation 1, this power dissipation is below
the maximum allowed dissipation for all ambient temperatures
up to and including 85°C.
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