参数资料
| 型号： | AD8223BRZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 6/20页 |
| 文件大小： | 0K |
| 描述： | IC AMP INST R-R LP 8SOIC |
| 产品培训模块： | Instrumentation Amplifiers Performance |
| 标准包装： | 98 |
| 放大器类型： | 仪表 |
| 电路数： | 1 |
| 输出类型： | 满摆幅 |
| 转换速率： | 0.3 V/µs |
| -3db带宽： | 200kHz |
| 电流 - 输入偏压： | 12nA |
| 电压 - 输入偏移： | 100µV |
| 电流 - 电源： | 650µA |
| 电压 - 电源，单路/双路(±)： | 3 V ~ 24 V，±2 V ~ 12 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SO |
| 包装： | 管件 |
| 产品目录页面： | 771 (CN2011-ZH PDF) |
AD8223
Rev. 0 | Page 14 of 20
THEORY OF OPERATION
AMPLIFIER ARCHITECTURE
The AD8223 is an instrumentation amplifier based on a
classic 3-op amp approach, modified to ensure operation
even at common-mode voltages at the negative supply rail.
The architecture allows lower voltage offsets, better CMRR,
and higher gain accuracy than competing instrumentation
amplifiers in its class.
+
–
8k
10k
50k
POSITIVE SUPPLY
7
INVERTING
2
1
4
8k
10k
50k
8
4
NEGATIVE SUPPLY
NON-
INVERTING
3
7
GAIN
OUT
6
REF
5
+
–
+
–
06
92
5-
03
8
Figure 31. Simplified Schematic
Figure 31 shows a simplified schematic of the AD8223. The
AD8223 has three stages. In the first stage, the input signal is
applied to PNP transistors. These PNP transistors act as voltage
buffers and allow input voltages below ground. The second
stage consists of a pair of 8 kΩ resistors, the RG resistor, and a
pair of amplifiers. This stage allows the amplification of the
AD8223 to be set with a single external resistor. The third stage
is a differential amplifier composed of an op amp, two 10 kΩ
resistors, and two 50 kΩ resistors. This stage removes the
common-mode signal and applies an additional gain of 5.
The transfer function of the AD8223 is
VOUT = G(VIN+ VIN) + VREF
where:
G
R
G
kΩ
0
8
5
GAIN SELECTION
Placing a resistor across the RG terminals sets the gain of the
AD8223, which can be calculated by referring to Table 7 or by
using the following gain equation:
5
kΩ
80
G
R
G
Table 7. Gains Achieved Using 1% Resistors
1% Standard Table
Value of RG (Ω)
Desired Gain
Calculated Gain
26.7 k
8
7.99
15.8 k
10
10.1
5.36 k
20
19.9
2.26 k
40
40.4
1.78 k
50
49.9
845
100
99.7
412
200
199
162
500
499
80.6
1000
998
The AD8223 defaults to G = 5 when no gain resistor is used. Add
the tolerance and gain drift of the RG resistor to the specifications
of the AD8223 to determine the total gain accuracy of the system.
When the gain resistor is not used, gain depends only on
internal resistor matching, so gain error and gain drift are
minimal.
INPUT VOLTAGE RANGE
The 3-op amp architecture of the AD8223 applies gain and then
removes the common-mode voltage. Therefore, internal nodes
in the AD8223 experience a combination of both the gained
signal and the common-mode signal. This combined signal can
be limited by the voltage supplies even when the individual input
and output signals are not. To determine whether the signal can be
limited, refer to Figure 18 through Figure 21. Alternatively, use
the parameters in the Specifications section to verify that the input
and output are not limited and then use the following formula to
make sure the internal nodes are not limited.
To check if it is limited by the internal nodes,
V
1
.
0
10
6
.
0
V
01
.
0
S
DIFF
CM
S
V
Gain
V
If more common-mode range is required, a solution is to apply less
gain in the instrumentation amplifier and more in a later stage.
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