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参数资料
| 型号： | AD822BRZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 5/24页 |
| 文件大小： | 0K |
| 描述： | IC OPAMP GP R-R 1.9MHZ LP 8SOIC |
| 设计资源： | 16-Bit Fully Isolated 4 mA to 20 mA Output Module Using AD5662, ADuM1401, and External Amplifiers (CN0064) |
| 标准包装： | 750 |
| 放大器类型： | 通用 |
| 电路数： | 2 |
| 输出类型： | 满摆幅 |
| 转换速率： | 3 V/µs |
| 增益带宽积： | 1.9MHz |
| -3db带宽： | 1.9MHz |
| 电流 - 输入偏压： | 2pA |
| 电压 - 输入偏移： | 300µV |
| 电流 - 电源： | 1.4mA |
| 电流 - 输出 / 通道： | 20mA |
| 电压 - 电源，单路/双路(±)： | 3 V ~ 36 V，±1.5 V ~ 18 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SO |
| 包装： | 带卷 (TR) |
AD822
Rev. I | Page 13 of 24
FREQUENCY (Hz)
100
–20
80
60
40
20
0
10
10M
100
OP
E
N
-L
OO
P
GA
IN
(
d
B
)
1k
10k
100k
1M
100
–20
80
60
40
20
0
P
HAS
E
M
A
RG
IN
(
D
eg
rees)
PHASE
GAIN
CL = 100pF
RL = 2k
00
87
4-
0
16
Figure 16. Open-Loop Gain and Phase Margin vs. Frequency
FREQUENCY (Hz)
1k
100
10M
1k
O
UT
P
UT
I
M
P
E
D
ANCE
(
)
10k
100k
1M
10
1
0.1
0.01
ACL = +1
VS = ±15V
00
87
4-
0
17
Figure 17. Output Impedance vs. Frequency
SETTLING TIME (s)
16
12
–16
05
1
OU
TP
U
T
S
W
IN
G
F
R
O
M
0
T
O
±
V
O
L
TS
23
4
0
–4
–8
–12
8
4
ERROR
1%
0.1%
1%
0.01%
0
08
74
-0
18
Figure 18. Output Swing and Error vs. Settling Time
90
80
0
40
30
20
10
60
50
70
CO
M
O
N
-M
O
D
E
RE
JE
CT
IO
N
(d
B)
FREQUENCY (Hz)
10M
100
1k
10k
100k
1M
10
VS = ±15V
VS = 0V, +5V
VS = 0V, +3V
00
87
4-
0
19
Figure 19. Common-Mode Rejection vs. Frequency
+125°C
–55°C
+25°C
POSITIVE
RAIL
NEGATIVE
RAIL
COMMON-MODE VOLTAGE FROM SUPP LY RAILS (V)
5
4
0
–1
3
C
O
MM
O
N
-M
O
D
E
ER
R
O
R
V
O
L
T
A
G
E
(
m
V
)
3
2
1
–55°C
+125°C
2
1
0
00
87
4-
0
20
Figure 20. Absolute Common-Mode Error vs. Common-Mode Voltage from
Supply Rails (VS VCM)
LOAD CURRENT (mA)
1000
100
0
0.001
100
0.01
OU
TP
U
T
S
A
TU
R
A
TI
O
N
V
O
L
T
AG
E
(
m
V
)
0.1
1
10
VS – VOH
VOL – VS
00
87
4-
02
1
Figure 21. Output Saturation Voltage vs. Load Current
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