参数资料
型号: AD8256A
厂商: Elite Semiconductor Memory Technology Inc.
英文描述: 2x16W Stereo Digital Audio Amplifier with Headphone Driver
中文描述: 2x16W立体声数字音频放大器驱动器,带有耳机
文件页数: 3/4页
文件大小: 321K
代理商: AD8256A
ES MT
AD8256A
Elite Semiconductor Memory Technology Inc.
Publication Date: May. 2007
Revision: 1.3 3/33
20
RA2
O
Right channel output2 (+)
21
GNDR2
P
Ground2 for right channel
22
RB2
O
Right channel output2 (-)
23
VDDRB2
P
Supply2 for right channel B
(Note2)
24
set
Re
I
Reset, low active
Schmitt trigger TTL input buffer
25
PD
I
Power down, low active
Schmitt trigger TTL input buffer
26
ERROR
O
ERROR output
Open-drain output
27
SA0
I
I
2
C select address 0
Schmitt trigger TTL input buffer
28
SA1
I
I
2
C select address 1
Schmitt trigger TTL input buffer
29
SCL
I
I
2
C serial clock input
Schmitt trigger TTL input buffer
30
SDA
I
I
2
C serial data input
Schmitt trigger TTL input buffer with
open-drain output
31
DEF
I
Default volume, 0=Mute, 1=Un-Mute
Schmitt trigger TTL input buffer
32
PWMSA
O
Half-bridge, sub-woofer channel output
TTL output buffer
33
AVDD
P
Analog supply
(Note1)
34
AGND
P
Analog ground
35
HPR
O
Headphone right channel output
36
HPL
O
Headphone left channel output
37
HP-SPK
I
Headphone detection
38
VDDLB2
P
Supply2 for left channel B
(Note2)
39
LB2
O
Left channel output2 (-)
40
GNDL2
P
Ground2 for left channel
41
LA2
O
Left channel output2 (+)
42
VDDLA2
P
Supply2 for left channel A
(Note2)
43
VDDLA1
P
Supply1 for left channel A
(Note2)
44
LA1
O
Left channel output1 (+)
45
GNDL1
P
Ground1 for left channel
46
LB1
O
Left channel output1 (-)
47
VDDLB1
P
Supply1 for left channel B
(Note2)
48
PLL_Byp
I
PLL Bypass
Schmitt trigger TTL input buffer
Note1
These pins provide the supply for digital PWM controller, headphone drivers, built-in PLL and
protection circuits except for loudspeaker short-circuit protection circuits.
Note2
These pins provide the supply for loudspeaker driver stages, which are known as “PVDD”.
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