参数资料
型号: AD8327ARU
厂商: ANALOG DEVICES INC
元件分类: 通用总线功能
英文描述: 5 V CATV Line Driver Coarse Step Output Power Control
中文描述: LINE DRIVER, PDSO20
封装: TSSOP-20
文件页数: 9/20页
文件大小: 307K
代理商: AD8327ARU
REV. 0
AD8327
–9–
Single-Ended Inverting Input
When operating the AD8327 in a single-ended input mode V
IN+
and V
IN–
should be terminated as illustrated in Figure 5. On the
AD8327 evaluation boards, this termination method requires
the removal of R13–R16 and R20, as well as the addition of a 0
jumper at R17. Table II shows the correct values for R11 and R12
for some common input configurations. Other input imped-
ance configurations may be accommodated using the equations
in Figure 5. The inverting and noninverting inputs of the AD8327
must be balanced for all input configurations
+
R11
R12
Z
IN
800
800
Z
IN
R12 =
AD8327
Z
IN
Z
IN
R12
R12
+
Z
IN
R11 =
Figure 5. Single-Ended Inverting Input
Differential Input from Single-Ended Source
The default configuration of the evaluation board implements a
differential signal drive from a single-ended signal source. A
TOKO 1:1 transformer is included on the board for this purpose
(T3). Enabling the evaluation board for single to differential input
conversion requires R11–R12 and R16–R17 to be removed, and
0
jumpers must be installed on the placeholders for R14, R15,
and R20. Table II provides typical R13 values for common
input configurations. Other input impedances may be calculated
using the equation in Figure 6. Refer to Figure 10 for evaluation
board schematic. To utilize the transformer for converting a single-
ended source into a differential signal, the input signal must
be applied to V
IN+
.
V
IN
+
R13
AD8327
R13 = Z
IN
1600
1600
Z
IN
Z
IN
Figure 6. Single to Differential Input
Differential Signal Source
The AD8327 evaluation board is also capable of accepting a
differential input signal. Remove R11–R12, R14–R15, and R20,
and place 0
jumpers for R16–R17. See Table II for common
values of R13, or calculate other input configurations using the
equation in Figure 7.
V
IN
+
AD8327
V
IN
R13
Z
IN
R13 =
Z
IN
1600
1600
Z
IN
Figure 7. Differential Input
Output Bias, Impedance, and Termination
The output of the AD8327 has a dc bias level of approximately
V
CC
/2; therefore, it should be ac-coupled before being applied to
the load. The output impedance of the AD8327 is internally
maintained at 75
, regardless of whether the amplifier is in
transmit enable or transmit disable mode. This eliminates the
need for external back termination resistors. If the output signal
is being evaluated using standard 50
test equipment, a mini-
mum loss 75
to 50
pad must be used to provide the test
circuit with the proper impedance match.
SDATA
CLK
TXEN
GND
V
CC
CXR
GND
GND
V
OUT
V
CC
SLEEP
V
IN
V
IN+
V
CC
GND
BYP
GND
V
CC
V
CC
ENB
AD8327
10 F
TO DIPLEXER Z
IN
= 75
TXEN
SDATA
CLK
SLEEP
ENB
0.1 F
0.1 F
0.1 F
0.1 F
0.1 F
165
V
IN
V
IN+
Z
IN
= 150
V
CC
100pF
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
0.1 F
0.1 F
0.1 F
0.1 F
Figure 4. Typical Application Circuit
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