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参数资料
| 型号： | AD8343 |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | DC-to-2.5 GHz High IP3 Active Mixer |
| 中文描述： | DC至2.5GHz的高IP3有源混频器 |
| 文件页数： | 16/27页 |
| 文件大小： | 394K |
| 代理商： | AD8343 |
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REV. 0
AD8343
–16–
For optimal LO-to-Output isolation it is important not to con-
nect the dc nodes of the emitter bias inductors together in an
attempt to share a single bias resistor. Doing so will cause isola-
tion degradation arising from V
BE
mismatches of the transistors
in the core.
OUTPUT INTERFACE (OUTP, OUTM)
The output of the AD8343 comprises a balanced pair of open-
collector outputs. These should be biased to about the same
voltage as is connected to VPOS (see dc specifications table).
Connecting them to an appreciably higher voltage is likely to
result in conduction of the ESD protection network on signal
peaks, which would cause high distortion levels. On the other
hand, setting the dc level of the outputs too low is also likely to
result in poor device linearity due to collector-base capacitance
modulation or saturation of the core transistors.
Output Matching Considerations
The AD8343 requires a differential load for much the same
reasons that the input needs a differential source to achieve
optimal device performance. In addition, a differential load will
provide the best LO to output isolation and the best input to
output isolation.
At low output frequencies it is usually not appropriate to
arrange a conjugate match between the device output and the
load, even though doing so would maximize the small signal
conversion gain. This is because the output impedance at low
frequencies is quite high (a high resistance in parallel with a
small capacitance). Refer to Figure 12 for a plot of the
differ-
ential
output impedance measured at the device pins. This
data is available in standard file format at the ADI web site
(www.analog.com).
If a matching high impedance load is used, sufficient output
voltage swing will occur to cause output clipping even at rela-
tively low input levels, which constitutes a loss of dynamic range.
The linear range of voltage swing at each output pin is about
±
1 volt from the supply voltage VPOS. A good compromise is to
provide a load impedance of about 500
between the output
pins at the desired output frequency (based on 15 mA to 20 mA
bias current at each input). At output frequencies below 500 MHz,
more output power can be obtained before the onset of gross
clipping by using a lower load impedance; however, both gain
and low order distortion performance will be degraded.
500MHz
1000MHz
1500MHz
2000MHz
50MHz
FREQUENCY (50MHz
–
2500MHz)
Figure 12. Output Differential Impedance (OUTP, OUTM)
The output load impedance should also be kept reasonably low
at the image frequency to avoid developing appreciable extra
voltage swing, which would again reduce dynamic range.
If maintaining a good output return loss is not required, a 10:1
(impedance) flux-coupled transformer may be used to present a
suitable load to the device and to provide collector bias via a center
tap as shown in Figure 21. At all but the lowest output frequen-
cies it becomes desirable to tune out the output capacitance of
the AD8343 by connecting an inductor between the output pins.
On the other hand, when a good output return loss is desired,
the output may be resistively loaded with a shunt resistance
between the output pins in order to set the real value of output
impedance. With selection of both the transformer
’
s impedance
ratio and the shunting resistance as required, the desired total
load (~500
) will be achieved while optimizing both signal
transfer and output return loss.
At higher output frequencies the output
conductance
of the
device becomes higher (Figure 12), with the consequence
that above about 900 MHz it
does
become appropriate to
perform a conjugate match between the load and the AD8343
’
s
output. The device
’
s own output admittance becomes sufficient
to remove the threat of clipping from excessive voltage swing. Just
as for the input, it may become necessary to perform differential
output impedance measurements on your board layout to effec-
tively develop a good matching network.
Output Biasing Considerations
When the output single-ended-to-differential conversion takes
the form of a transformer whose primary winding is center-
tapped, simply apply VPOS to the tap, preferably through a
ferrite bead in series with the tap in order to avoid a common-
mode instability problem (reference section on Input and Output
Stability Considerations). Refer to Figure 21 for an example of
this network. The collector dc bias voltage should be nominally
equal to the supply voltage applied to Pin 5 (VPOS).
If a 1:1 transmission line balun is used for the output, it will be
necessary to bring in collector bias through separate inductors.
These inductors should be chosen to obtain a high impedance at
the RF frequency, while maintaining a suitable self-resonant
frequency. Refer to Figure 22 for an example of this network.
INPUT AND OUTPUT STABILITY CONSIDERATIONS
The differential configuration of the input and output ports of
the AD8343 raises the need to consider both differential and
common-mode RF stability of the device. Throughout the fol-
lowing stability discussion, common mode will be used to refer
to a signal that is referenced to ground. The equivalent common-
mode impedance will be the value of impedance seen from the
node under discussion to ground. The book
“
Microwave Tran-
sistor Amplifiers
”
by Guillermo Gonzalez also has an excellent
section covering stability of amplifiers.
The AD8343 is unconditionally stable for any differential im-
pedance, so device stability need not be considered with respect
to the
differential
terminations. However, the device is potentially
unstable (k factor is less than one) for some common-mode
impedances. Figures 13 and 14 plot the input and output
common-mode stability regions, respectively. Figure 15
shows the test equipment configuration to measure these
stability circles.
相关PDF资料 |
PDF描述 |
|---|---|
| AD8343-EVAL | DC-to-2.5 GHz High IP3 Active Mixer |
| AD8343ARU | DC-to-2.5 GHz High IP3 Active Mixer |
| AD8343ARU-REEL7 | DC-to-2.5 GHz High IP3 Active Mixer |
| AD8344 | Active Receive Mixer 400 MHz to 1.2 GHz |
| AD8344-EVAL | Active Receive Mixer 400 MHz to 1.2 GHz |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD8343(14SOIC) | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog IC |
| AD8343(14TSSOP) | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog IC |
| AD8343ARU | 制造商:Analog Devices 功能描述:Up/Down Conv Mixer 5V 2.4GHz 14-Pin TSSOP 制造商:Rochester Electronics LLC 功能描述:IC, 800-2500MHZ HIGH IP3 ACTIVE MIXER - Bulk 制造商:Analog Devices 功能描述:High-performance active mixer 14TSSOP Tube 制造商:Analog Devices 功能描述:IC ACTIVE MIXER HIGH IP3 |
| AD8343ARU-REEL | 制造商:Analog Devices 功能描述:Up/Down Conv Mixer 5V 2.4GHz 14-Pin TSSOP T/R 制造商:Analog Devices 功能描述:UP/DOWN CONV MIXER 5V 2.4GHZ 14TSSOP - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:TSSOP 800-2500MHZ HIGH IP3 ACTIVE MIXER - Tape and Reel |
| AD8343ARU-REEL7 | 制造商:Analog Devices 功能描述:Up/Down Conv Mixer 5V 2.4GHz 14-Pin TSSOP T/R 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel 制造商:Analog Devices 功能描述:IC ACTIVE MIXER HIGH IP3 |
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