参数资料
型号: AD8349AREZ-RL7
厂商: ANALOG DEVICES INC
元件分类: 调制器/解调器
英文描述: 700 MHz - 2700 MHz RF/MICROWAVE QPSK MODULATOR
封装: MO-153ABT, TSSOP-16
文件页数: 9/28页
文件大小: 729K
代理商: AD8349AREZ-RL7
AD8349
Rev. A | Page 17 of 28
03570-0-046
1.0
1.5
2.0
2.5
3.0
3.5
4.0
300
350
400
450
500
550
600
650
700
LO FREQUENCY (MHz)
S
B
OUTP
UT
P
O
WE
R
(dBm)
–60
–50
–40
–30
–20
–10
0
S
IDE
BAND
S
U
P
RE
S
ION
(dBc
)
SSB
USB
Figure 45. Sideband Suppression below 700 MHz
03570-0-047
–1
0
LO FREQUENCY (MHz)
SSB
OU
TPU
T
POW
E
R
(
d
B
m
)
–44
–43
–42
–41
–40
SIDEBAND
SUPPRESSION
(dBc)
USB
SSB
–8
–7
–6
–5
–4
–3
–2
–45
–46
–48
–47
2700
2750
2800
2850
2900
2950
3000
Figure 46. Sideband Suppression above 2700 MHz
SINGLE-ENDED LO DRIVE
The LO input can be driven single-ended at the expense of
higher LO feedthrough at most frequencies (see Figure 48).
LOIN is ac-coupled to ground, and LOIP is driven through a
coupling capacitor from a single-ended 50 source (see
A 400 shunt resistor on the signal-source side of the ac
coupling capacitor was used for the measurement.
AD8349
LOIN
LOIP
5
6
LO
100pF
400
100pF
03570-0-048
Figure 47. Schematic for Single-Ended LO Drive
–60
–55
–50
–45
–40
–35
–30
–25
–20
–15
–10
CARRIE
R
F
E
D
T
HROUGH
(
d
Bm
)
700
900
1100 1300 1500 1700 1900 2100 2300 2500 2700
LO FREQUENCY (MHz)
SINGLE-ENDED LO DRIVE
DIFFERENTIAL LO DRIVE
03570-0-049
Figure 48. LO Feedthrough vs. Frequency, Single-Ended vs. Differential LO
Drive (Single-Sideband Modulation)
RF OUTPUT
The RF output is designed to drive a 50 load, but should be
ac-coupled, as shown in Figure 43, because of internal dc
biasing. The RF output impedance is close to 50 and provides
fairly good return loss over the specified operating frequency
range (see Figure 24). As a result, no additional matching
circuitry is required if the output is driving a 50 load. The
output power of the AD8349 under nominal conditions
(1.2 V p-p differential baseband drive, 400 mV dc baseband
bias, and a 5 V supply) is shown in Figure 7.
OUTPUT ENABLE
The ENOP pin can be used to turn the RF output on and off.
This pin should be held high (greater than 2 V) for normal
operation. Taking ENOP low (less than 800 mV) disables the
output power and provides an off-isolation level of < –50 dBm
at the output.
Figure 49 and Figure 50 show the enable and disable time
domain responses of the ENOP function at 900 MHz. Typical
enable and disable times are approximately 20 ns and
50 ns, respectively.
03570-0-050
–8
–4
–2
–6
0
V
EN
OP
(V
)
4
2
8
6
–800
–400
–200
–600
0
V
VOU
T
(mV
)
400
200
800
600
TIME (ns)
0
20
100
40
60
80
Figure 49. ENOP Enable Time, 900 MHz
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