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| 型号： | AD8564ARZ-REEL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 2/12页 |
| 文件大小： | 0K |
| 描述： | IC COMPARATOR QUAD 7NS 16SOIC TR |
| 标准包装： | 1,000 |
| 类型： | 通用 |
| 元件数： | 4 |
| 输出类型： | CMOS，TTL |
| 电压 - 输入偏移（最小值）： | 7mV @ 5V |
| 电流 - 输入偏压（最小值）： | 4µA @ 5V |
| 电流 - 静态（最大值）： | 14mA，14mA，7mA |
| CMRR, PSRR（标准）： | 85dB CMRR，80dB PSRR |
| 传输延迟（最大）： | 9.8ns |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 安装类型： | 表面贴装 |
| 包装： | 带卷 (TR) |
AD8564
Rev. B | Page 10 of 12
USING HYSTERESIS
Hysteresis can easily be added to a comparator through the
addition of positive feedback. Adding hysteresis to a comparator
offers an advantage in noisy environments where it is not desirable
for the output to toggle between states when the input signal is
near the switching threshold. Figure 17 shows a method for
configuring the AD8564 with hysteresis.
COMPARATOR
SIGNAL
R1
R2
VREF
CF
0
1
10
3-
0
17
Figure 17. Configuring the AD8564 with Hysteresis
The input signal is connected directly to the inverting input of
the comparator. The output is fed back to the noninverting
input through R2 and R1. The ratio of R1 to R1 + R2 and the
output swing establishes the width of the hysteresis window,
with VREF setting the center of the window or the average
switching voltage. The output switches high when the input
voltage is greater than VHI and does not switch low again until
the input voltage is less than VLO, as given in Equation 2.
(
)
REF
HI
V
R2
R1
V
+
=
+
1
(1)
+
=
R2
R1
V
REF
LO
1
(2)
where V+ is the positive supply voltage.
The CF capacitor may also be added to introduce a pole into
the feedback network. This has the effect of increasing the
amount of hysteresis at high frequencies. This can be useful
when comparing a relatively slow signal in a high frequency
noise environment.
At frequencies greater than
R2
C
f
F
P
π
=
2
1
, the hysteresis
window approaches VHI = V+ – 1 V and VLO = 0 V.
At frequencies less than fP, the threshold voltages remain as it is
in Equation 1.
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