参数资料
型号: AD8610ARZ
厂商: Analog Devices Inc
文件页数: 7/24页
文件大小: 0K
描述: IC OPAMP JFET 25MHZ PREC 8SOIC
产品培训模块: Power Line Monitoring
Top Five Problems in Photodiode Opamp Circuits
设计资源: Precision, AC Reference Signal Attenuator Using AD5546/56 Multiplying DAC (CN0025)
标准包装: 98
放大器类型: J-FET
电路数: 1
转换速率: 60 V/µs
增益带宽积: 25MHz
电流 - 输入偏压: 3pA
电压 - 输入偏移: 85µV
电流 - 电源: 3mA
电流 - 输出 / 通道: 45mA
电压 - 电源,单路/双路(±): ±5 V ~ 13 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SO
包装: 管件
产品目录页面: 773 (CN2011-ZH PDF)
AD8610/AD8620
Rev. F | Page 15 of 24
Slew Rate (Unity Gain Inverting vs. Noninverting)
Amplifiers generally have a faster slew rate in an inverting unity
gain configuration due to the absence of the differential input
capacitance. Figure 49 through Figure 52 show the performance
of the AD8610/AD8620 configured in a unity gain of –1 compared
to the OPA627. The AD8610/AD8620 slew rate is more symme-
trical, and both the positive and negative transitions are much
cleaner than in the OPA627.
02
73
0-
0
49
V
O
L
T
A
G
E
(
5V/
D
IV)
TIME (400ns/DIV)
VS = ±13V
RL = 2k
G= –1
SR = 54V/s
Figure 49. +Slew Rate of AD8610/AD8620 in Unity Gain of –1
02
73
0-
0
50
VO
L
T
A
G
E
(
5V/
D
IV)
TIME (400ns/DIV)
VS = ±13V
RL = 2k
G= –1
SR = 42.1V/s
Figure 50. +Slew Rate of OPA627 in Unity Gain of –1
02
730
-05
1
VO
L
T
A
G
E
(
5V/
D
IV
)
TIME (400ns/DIV)
VS = ±13V
RL = 2k
G= –1
SR = 54V/s
Figure 51. –Slew Rate of AD8610/AD8620 in Unity Gain of –1
02
73
0-
0
52
VO
L
T
A
G
E
(
5V/
D
IV)
TIME (400ns/DIV)
VS = ±13V
RL = 2k
G= –1
SR = 56V/s
Figure 52. –Slew Rate of OPA627 in Unity Gain of –1
The AD8610/AD8620 have a very fast slew rate of 60 V/μs even
when configured in a noninverting gain of +1. This is the toughest
condition to impose on any amplifier because the input common-
mode capacitance of the amplifier generally makes its SR appear
worse. The slew rate of an amplifier varies according to the voltage
difference between its two inputs. To observe the maximum SR,
a voltage difference of about 2 V between the inputs must be
ensured. This is required for virtually any JFET op amp so that
one side of the op amp input circuit is completely off, thus maxi-
mizing the current available to charge and discharge the internal
compensation capacitance. Lower differential drive voltages
produce lower slew rate readings. A JFET input op amp with a
slew rate of 60 V/μs at unity gain with VIN = 10 V may slew at
20 V/μs if it is operated at a gain of +100 with VIN = 100 mV.
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