参数资料
| 型号： | AD872AJD |
| 厂商： | Analog Devices Inc |
| 文件页数： | 20/20页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 10MSPS 28-CDIP |
| 标准包装： | 1 |
| 位数： | 12 |
| 采样率（每秒）： | 10M |
| 数据接口： | 并联 |
| 转换器数目： | 7 |
| 功率耗散（最大）： | 1.3W |
| 电压电源： | 模拟和数字，双 ± |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 28-CDIP（0.605"，15.37mm） |
| 供应商设备封装： | 28-CDIP |
| 包装： | 管件 |
| 输入数目和类型： | 2 个单端，双极；1 个差分，双极 |
REV. A
–9–
AD872A
THEORY OF OPERATION
The AD872A is implemented using a 4-stage pipelined multiple
flash architecture. A differential input track-and-hold amplifier
(THA) acquires the input and converts the input voltage into a
differential current. A 4-bit approximation of the input is made
by the first flash converter, and an accurate analog representa-
tion of this 4-bit guess is generated by a digital-to-analog con-
verter. This approximation is subtracted from the THA output
to produce a remainder, or residue. This residue is then sam-
pled and held by the second THA, and a 4-bit approximation is
generated and subtracted by the second stage. Once the second
THA goes into hold, the first stage goes back into track to
acquire a new input signal. The third stage provides a 3-bit ap-
proximation/subtraction operation, and produces the final resi-
due, which is passed to a final 4-bit flash converter. The 15
output bits from the 4 flash converters are accumulated in the
correction logic block, which adds the bits together using the
appropriate correction algorithm, to produce the 12-bit output
word. The digital output, together with overrange indicator, is
latched into an output buffer to drive the output pins.
The additional THA inserted in each stage of the AD872A
architecture allows pipelining of the conversion. In essence, the
converter is converting multiple inputs simultaneously, process-
ing them through the converter chain serially. This means that
while the converter is capable of capturing a new input sample
every clock cycle, it actually takes three clock cycles for the con-
version to be fully processed and appear at the output. This
“pipeline delay” is often referred to as latency, and is not a con-
cern in most applications, however there are some cases where it
may be a consideration. For example, some applications call for
the A/D converter to be placed in a high speed feedback loop,
where its input is servoed to provide a desired result at the digi-
tal output (e.g., offset calibration or zero restoration in video
applications). In these cases the three clock cycle delay through
the pipeline must be accounted for in the loop stability calcula-
tions. Also, because the converter is working on three conver-
sions simultaneously, major disruptions to the part (such as a
large glitch on the supplies or reference) may corrupt three data
samples. Finally, there will be a minimum clock rate below
which the THA droop corrupts the signal in the pipeline. In the
case of the AD872A, this minimum clock rate is 10 kHz.
The high impedance differential inputs of the AD872A allow a
variety of input configurations (see APPLYING THE AD872A),
The AD872A converts the voltage difference between the VINA
and VINB pins. For single-ended applications, one input pin
(VINA or VINB) may be grounded, but even in this case the differ-
ential input can provide a performance boost: for example, for
an input coming from a coaxial cable, VINB can be tied to the
shield ground, allowing the AD872A to reject shield noise as
common mode. The high input impedance of the device mini-
mizes external driving requirements and allows the user to exter-
nally select the appropriate termination impedance for the
application.
The AD872A clock circuitry uses both edges of the clock in its
internal timing circuitry (see spec page for exact timing require-
ments). The AD872A samples the analog input on the rising
edge of the clock input. During the clock low time (between the
falling edge and rising edge of the clock) the input THA is in
track mode; during the clock high time it is in hold. System dis-
turbances just prior to the rising edge of the clock may cause the
part to acquire the wrong value, and should be minimized.
While the part uses both clock edges for its timing, jitter is only
a significant issue for the rising edge of the clock (see CLOCK
INPUT section).
APPLYING THE AD872A ANALOG INPUTS
The AD872A features a high impedance differential input that
can readily operate on either single-ended or differential input
signals. Table I summarizes the nominal input voltage span for
both single-ended and differential modes, assuming a 2.5 V
reference input.
Table I. Input Voltage Span
VINA
VINB
VINA–VINB
Single-Ended
+1 V
GND
+1 V (Positive Full Scale)
–1 V
GND
–1 V (Negative Full Scale)
Differential
+0.5 V
–0.5 V
+1 V (Positive Full Scale)
–0.5 V
+0.5 V
–1 V (Negative Full Scale)
Figure 10 shows an approximate model for the analog input cir-
cuit. As this model indicates, when the input exceeds 1.6 V
(with respect to AGND), the input device may saturate, causing
the input impedance to drop substantially and significantly re-
ducing the performance of the part. Input compliance in the
negative direction is somewhat larger, showing virtually no deg-
radation in performance for inputs as low as –1.9 V.
+5V
1.75mA
+1.6V
5pF
–1.9V
–5V
1.75mA
VINA OR VINB
1V
AD872A
Figure 10. AD872A Equivalent Analog Input Circuit
Figure 11 illustrates the effect of varying the common-mode
voltage of a –0.5 dB input signal on total harmonic distortion.
–1
–0.8
–0.6 –0.4
–0.2
0
0.2
0.4
0.6
0.8
1.0
CM INPUT VOLTAGE – V
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
THD
–
d
B
Figure 11. AD872A Total Harmonic Distortion vs. CM Input
Voltage, fIN = 1 MHz, FS = 10 MSPS
OBSOLETE
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相关代理商/技术参数 |
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| AD872AJE | 制造商:Rochester Electronics LLC 功能描述:IC, 12-BIT 10 MSPS ADC - Bulk |
| AD872ASD | 制造商:AD 制造商全称:Analog Devices 功能描述:Complete 12-Bit 10 MSPS Monolithic A/D Converter |
| AD872ASD/883B | 制造商:Analog Devices 功能描述:ADC Single Pipelined 10Msps 12-bit Parallel 28-Pin CDIP 制造商:Analog Devices 功能描述:ADC SGL PIPELINED 10MSPS 12-BIT PARALLEL 28CDIP - Rail/Tube 制造商:Rochester Electronics LLC 功能描述:IC, 12-BIT 10 MSPS ADC - Bulk 制造商:Analog Devices 功能描述:CONVERTER - ADC |
| AD872ASE | 制造商:AD 制造商全称:Analog Devices 功能描述:Complete 12-Bit 10 MSPS Monolithic A/D Converter |
| AD872ASE/883B | 制造商:Analog Devices 功能描述:ADC Single Pipelined 10Msps 12-bit Parallel 44-Pin LCC 制造商:Rochester Electronics LLC 功能描述:IC, 12-BIT 10 MSPS ADC - Bulk |
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