REV. A
–10–
AD872A
Figure 12 shows the common-mode rejection performance vs.
frequency for a 1 V p-p common-mode input. T his excellent
common-mode rejection over a wide bandwidth affords the user
the opportunity to eliminate many potential sources of input
noise as common mode by using the differential input structure
of the AD872A.
INPUT FREQUENCY – Hz
–20
–30
–40
–50
–60
–70
–80
–90
–100
C
10
5
10
6
10
7
10
8
Figure 12. Common-Mode Rejection vs. Input Frequency,
1 V p-p Input
Figures 13 and 14 illustrate typical input connections for single-
ended inputs.
1
AD872A
V
INA
V
INB
2
6
1V
Figure 13. AD872A Single-Ended Input Connection
AD872A
V
INA
V
INB
6
1V
R
T
2
1
Figure 14. AD872A Single-Ended Input Connection Using
a Shielded Cable
T he cable shield is used as a ground connection for the V
INB
in-
put, providing the best possible rejection of the cable noise from
the input signal. Note also that the high input impedance of the
AD872A allows the user to select the termination impedance, be
it 50 ohms, or some other value. Furthermore, unlike many
flash converters, most AD872A applications will not require an
external buffer amplifier. If such an amplifier is required, we
suggest either the AD811 or AD9617.
Figure 15 illustrates how external amplifiers may be used to
convert a single-ended input into a differential signal. T he resis-
tor values of 536
and 562
were selected to provide opti-
mum phase matching between U1 and U2.
V
IN
(
6
0.5V)
U2
AD872A
562
V
562
V
536
V
536
V
V
INA
V
INB
U1
Figure 15. Single-Ended to Differential Connections; U1,
U2 = AD811 or AD9617
T he use of the differential input signal can help to minimize
even-order distortion from the input T HA where performance
beyond –70 dB is desired.
Figure 16 shows the AD872A large signal (–0.5 dB) and small
signal (–20 dB) frequency response.
INPUT FREQUENCY – Hz
10
0
–10
–20
–30
–40
–50
F
10
4
10
5
10
6
10
7
10
8
Figure 16. Full Power (–0.5 dB) and Small Signal
Response (–20 dB) vs. Input Frequency
T he AD872A’s wide input bandwidth facilitates rapid acquisi-
tion of transient input signals: the input T HA can typically settle
to 12-bit accuracy from a full-scale input step in less than 40 ns.
Figure 17 illustrates the typical acquisition of a full-scale input
step.
4500
4000
3500
3000
2500
2000
1500
1000
500
0
0 10 20 30 40 50 60 70 80
nsec
C
Figure 17. Typical AD872A Settling Time