AD8801/AD8803
REV. A
–3–
ORDE RING GUIDE
Package
Description
Package
Option
Model
FT N
T emperature
AD8801AN
AD8801AR
AD8803AN
AD8803AR
RS
RS
REFL
REFL
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
–40
°
C to +85
°
C
PDIP-16
SO-16
PDIP-16
SO-16
N-16
R-16A
N-16
R-16A
AD8803 PIN DE SCRIPT IONS
Pin Name
Description
1
2
3
4
5
6
V
REFH
O1
O2
O3
O4
SHDN
Reference inputs open circuit, active low, all
DAC outputs open circuit. DAC latch settings
maintained.
CS
Chip Select Input, active low. When
CS
returns
high, data in the serial input register is decoded
based on the address bits and loaded into the tar-
get DAC register.
GND
Ground
V
REFL
Common Low-Side DAC Reference Input
CLK
Serial Clock Input, Positive Edge T riggered
SDI
Serial Data Input
O5
DAC Output #5, Addr = 100
2
O6
DAC Output #6, Addr = 101
2
O7
DAC Output #7, Addr = 110
2
O8
DAC Output #8, Addr = 111
2
V
DD
Positive power supply, specified for operation at
both +3 V and +5 V.
Common High-Side DAC Reference Input
DAC Output #1, Addr = 000
2
DAC Output #2, Addr = 001
2
DAC Output #3, Addr = 010
2
DAC Output #4, Addr = 011
2
7
8
9
10
11
12
13
14
15
16
ABSOLUT E MAX IMUM RAT INGS
(T
A
= +25
°
C, unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3, +8 V
V
REFX
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, V
DD
Outputs (Ox) to GND . . . . . . . . . . . . . . . . . . . . . . . . 0 V, V
DD
Digital Input Voltage to GND . . . . . . . . . . . . . . . . . . 0 V, V
DD
Operating T emperature Range . . . . . . . . . . . . .–40
°
C to +85
°
C
Maximum Junction T emperature (T
J
MAX ) . . . . . . . . +150
°
C
Storage T emperature . . . . . . . . . . . . . . . . . . . –65
°
C to +150
°
C
Lead T emperature (Soldering, 10 sec) . . . . . . . . . . . . . +300
°
C
Package Power Dissipation . . . . . . . . . . . . .(T
J
MAX – T
A
)/
θ
JA
T hermal Resistance
θ
JA,
SOIC (SO-16) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
°
C/W
P-DIP (N-16) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
°
C/W
AD8801 PIN DE SCRIPT IONS
Description
Pin Name
1
2
3
4
5
6
V
REFH
O1
O2
O3
O4
SHDN
Reference input open circuit, active low, all
DAC outputs open circuit. DAC latch settings
maintained.
CS
Chip Select Input, active low. When
CS
returns
high, data in the serial input register is decoded
based on the address bits and loaded into the tar-
get DAC register.
GND
Ground
CLK
Serial Clock Input, Positive Edge T riggered
SDI
Serial Data Input
O5
DAC Output #5, Addr = 100
2
O6
DAC Output #6, Addr = 101
2
O7
DAC Output #7, Addr = 110
2
O8
DAC Output #8, Addr = 111
2
RS
Asynchronous preset to midscale output setting,
active low. Loads all DAC latches with 80
H
.
V
DD
Positive power supply, specified for operation at
both +3 V and +5 V.
Common DAC Reference Input
DAC Output #1, Addr = 000
2
DAC Output #2, Addr = 001
2
DAC Output #3, Addr = 010
2
DAC Output #4, Addr = 011
2
7
8
9
10
11
12
13
14
15
16
PIN CONFIGURAT IONS
V
REFH
O1
V
DD
RS
O4
SHDN
CS
O6
O5
SDI
O2
O3
O8
O7
GND
CLK
1
2
16
15
5
6
7
12
11
10
3
4
14
13
8
9
TOP VIEW
(Not to Scale)
AD8801
V
REFH
O1
V
DD
O8
O4
SHDN
CS
O5
SDI
CLK
O2
O3
O7
O6
GND
V
REFL
1
2
16
15
5
6
7
12
11
10
3
4
14
13
8
9
TOP VIEW
(Not to Scale)
AD8803
WARNING!
ESD SENSITIVE DEVICE
C AUT ION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although these devices feature proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.