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参数资料
| 型号： | AD8804AN |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | DAC |
| 英文描述： | 12 Channel, 8-Bit TrimDACs with Power Shutdown |
| 中文描述： | 12, SERIAL INPUT LOADING, 0.6 us SETTLING TIME, 8-BIT DAC, PDIP20 |
| 封装： | PLASTIC, DIP-20 |
| 文件页数： | 6/16页 |
| 文件大小： | 432K |
| 代理商： | AD8804AN |
AD8802/AD8804
REV. 0
–6–
HOURS OF OPERATION AT 150
°
C
0.04
–0.04
0
–0.02
0.02
0
600
200
300
500
V
DD
= +4.5V
V
REF
= +4.5V
SS = 176 PCS
x
+ 2
σ
C
x
x
– 2
σ
100
400
Figure 13. Full-Scale Error Accelerated by Burn-In
HOURS OF OPERATION AT 150
°
C
1.0
–1.0
0
–0.5
0.5
I
0
600
200
300
400
V
DD
= +4.5V
V
REF
= +4.5V
CODE = 55
H
SS = 176 PCS
x
+ 2
σ
x
x
– 2
σ
100
500
Figure 14. REF Input Resistance Accelerated by Burn-In
OPERATION
The AD8802/AD8804 provides twelve channels of program-
mable voltage output adjustment capability. Changing the pro-
grammed output voltage of each DAC is accomplished by
clocking in a 12-bit serial data word into the SDI (Serial Data
Input) pin. The format of this data word is four address bits,
MSB first, followed by 8 data bits, MSB first. Table I provides
the serial register data word format. The AD8802/AD8804 has
the following address assignments for the ADDR decode which
determines the location of the DAC register receiving the serial
register data in Bits B7 through B0:
DAC# = A
3
×
8
+ A
2
×
4
+ A
1
×
2
+ A
0
+
1
DAC outputs can be changed one at a time in random se-
quence. The fast serial-data loading of 33 MHz makes it pos-
sible to load all 12 DACs in as little time as 4.6
μ
s (13
×
12
×
30 ns). The exact timing requirements are shown in Figure 15.
Table I. Serial-Data Word Format
ADDR
B11 B10 B9
DATA
B6
B8
B7
B5
B4
B3
B2
B1 B0
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1 D0
MSB
LSB MSB
LSB
2
11
2
10
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
The AD8802 offers a midscale preset activated by the
RS
pin
simplifying initial setting conditions at first power-up. The
AD8804 has both a V
REFH
and a V
REFL
pin to establish indepen-
dent positive full-scale and zero-scale settings to optimize reso-
lution. Both parts offer a power shutdown
SHDN
which places
the DAC structure in a zero power consumption state resulting
in only leakage currents being consumed from the power supply
and V
REF
inputs. In shutdown mode the DACX register settings
are maintained. When returning to operational mode from
power shutdown the DAC outputs return to their previous volt-
age settings.
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
DAC REGISTER LOAD
1
0
1
0
1
0
+5V
0V
SDI
CLK
CS
V
OUT
Figure 15a. Timing Diagram
A
X
OR D
X
A
X
OR D
X
1
0
1
0
1
0
+5V
0V
SDI
(DATA IN)
CLK
CS
V
OUT
±
1/2 LSB
±
1/2 LSB ERROR BAND
t
CSH
t
CL
t
CSS
t
DS
t
DH
t
CS1
DETAIL SERIAL DATA INPUT TIMING (
RS
= "1")
t
CSW
t
S
t
CH
Figure 15b. Detail Timing Diagram
t
S
t
RS
±
1 LSB
±
1 LSB ERROR BAND
1
0
+5V
2.5V
RS
V
OUT
RESET TIMING
Figure 15c. Reset Timing Diagram
相关PDF资料 |
PDF描述 |
|---|---|
| AD8804AR | 12 Channel, 8-Bit TrimDACs with Power Shutdown |
| AD8804ARU | 12 Channel, 8-Bit TrimDACs with Power Shutdown |
| AD8802 | 12 Channel, 8-Bit TrimDACs with Power Shutdown |
| AD8802AN | 12 Channel, 8-Bit TrimDACs with Power Shutdown |
| AD8802AR | 12 Channel, 8-Bit TrimDACs with Power Shutdown |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD8804ANZ | 功能描述:IC DAC 8BIT 12CH W/SD 20DIP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:TrimDAC® 标准包装:1 系列:- 设置时间:4.5µs 位数:12 数据接口:串行，SPI? 转换器数目:1 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOICN 包装:剪切带 (CT) 输出数目和类型:1 电压，单极；1 电压，双极 采样率（每秒）:* 其它名称:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND |
| AD8804AR | 功能描述:IC DAC 8BIT 12CH W/SD 20-SOIC RoHS:否 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:TrimDAC® 标准包装:2,400 系列:- 设置时间:- 位数:18 数据接口:串行 转换器数目:3 电压电源:模拟和数字 功率耗散（最大）:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:36-TFBGA 供应商设备封装:36-TFBGA 包装:带卷 (TR) 输出数目和类型:* 采样率（每秒）:* |
| AD8804AR-REEL | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| AD8804ARU | 制造商:Analog Devices 功能描述:DAC 12-CH R-2R 8-bit 20-Pin TSSOP |
| AD8804ARU-REEL | 制造商:Analog Devices 功能描述:DAC 12-CH R-2R 8-bit 20-Pin TSSOP T/R |
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