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参数资料
| 型号： | AD9060TZ |
| 厂商： | ANALOG DEVICES INC |
| 元件分类： | ADC |
| 英文描述： | 10-Bit 75 MSPS A/D Converter |
| 中文描述： | 1-CH 10-BIT FLASH METHOD ADC, PARALLEL ACCESS, CQFP68 |
| 封装： | GULL WING, CERAMIC, LCC-68 |
| 文件页数： | 6/12页 |
| 文件大小： | 215K |
| 代理商： | AD9060TZ |
AD9060
–6–
REV. A
MIL-ST D-883 Compliance Information
T he AD9060 devices are classified within Microcircuits Group
57, T echnology Group D (bipolar A/D converters) and are con-
structed in accordance with MIL-ST D-883. T he AD9060 is
electrostatic sensitive and falls within electrostatic sensitivity
classification Class 1. Percent Defective Allowance (PDA) is
computed based on Subgroup 1 of the specified Group A test
list. Quality Assurance (QA) screening is in accordance with Al-
ternate Method A of Method 5005.
T he following apply: Burn-In per 1015; Life T est per 1005;
Electrical T esting per 5004. (Note: Group A electrical testing
assumes T
A
= T
C
= T
J
.) MIL-ST D-883-compliant devices are
marked with “C” to indicate compliance.
AD9060
4,5,17,
18,25,27,
31,32,36,
38,39,43,
45,52,53,66,67
100
ANALOG IN
ENCODE
GROUND
2,16,28,29,35,
41,42,54,64
0.1
μ
F
0.1
μ
F
AD1
AD2
3,6,15,30,33,34,
37,40,55,65,68
LSB INVERT
MSB
INVERT
STATIC:
DYNAMIC:
AD1 = –2V; AD 2 = ECL HIGH
AD3 = ECL LOW
AD1 =
±
2V TRIANGLE WAVE
AD2,AD3 = ECL PULSE TRAIN
9
46
19
14
51
12
8
56
59
61
+2V
–2V
+V
REF
–V
REF
D
5
– D
9
D
0
– D
4
+V
S
5.0V
+
13
ENCODE
AD3
–5.2V
23
510
510
510
–V
S
510
510
AD9060 Burn-ln Connections
T HE ORY OF OPE RAT ION
Refer to the AD9060 block diagram. As shown, the AD9060
uses a modified “flash,” or parallel, A/D architecture. T he ana-
log input range is determined by an external voltage reference
(+V
REF
and –V
REF
), nominally
±
1.75 V. An internal resistor
ladder divides this reference into 512 steps, each representing
two quantization levels. T aps along the resistor ladder (1/4
REF
,
1/2
REF
and 3/4
REF
) are provided to optimize linearity. Rated
performance is achieved by driving these points at 1/4, 1/2 and
3/4, respectively, of the voltage reference range.
T he A/D conversion for the nine most significant bits (MSBs) is
performed by 512 comparators. T he value of the least signifi-
cant bit (LSB) is determined by a unique interpolation scheme
between adjacent comparators. T he decoding logic processes
the comparator outputs and provides a 10-bit code to the out-
put stage of the converter.
Flash architecture has an advantage over other A/D architec-
tures because conversion occurs in one step. T his means the
performance of the converter is limited primarily by the speed
and matching of the individual comparators. In the AD9060, an
innovative interpolation scheme takes advantage of flash archi-
tecture but minimizes the input capacitance, power and device
count usually associated with that method of conversion.
T hese advantages occur because of using only half the normal
number of input comparator cells to accomplish the conversion.
In addition, a proprietary decoding scheme minimizes error
codes. Input control pins allow the user to select from among
Binary, Inverted Binary, T wos Complement and Inverted T wos
Complement coding (see AD9060 T ruth T able).
APPLIC AT IONS
Many of the specifications used to describe analog/digital con-
verters have evolved from system performance requirements in
these applications. Different systems emphasize particular speci-
fications, depending on how the part is used. T he following ap-
plications highlight some of the specifications and features that
make the AD9060 attractive in these systems.
Wideband Receivers
Radar and communication receivers (baseband and direct IF
digitization), ultrasound medical imaging, signal intelligence and
spectral analysis all place stringent ac performance requirements
on analog-to-digital converters (ADCs). Frequency domain
characterization of the AD9060 provides signal-to-noise ratio
(SNR) and harmonic distortion data to simplify selection of the
ADC.
Receiver sensitivity is limited by the
Signal-to-Noise Ratio (SNR)
of the system. T he SNR for an ADC is measured in the fre-
quency domain and calculated with a Fast Fourier T ransform
(FFT ). T he SNR equals the ratio of the fundamental compo-
nent of the signal (rms amplitude) to the rms value of the
“noise.” T he noise is the sum of all other spectral components,
including harmonic distortion but excluding dc.
Good receiver design minimizes the level of spurious signals in
the system. Spurious signals developed in the ADC are the result
of imperfections in the device transfer function (nonlinearities,
delay mismatch, varying input impedance, etc.). In the ADC,
these spurious signals appear as
Harmonic Distortion.
Harmonic
Distortion is also measured with an FFT and is specified as the
ratio of the fundamental component of the signal (rms ampli-
tude) to the rms value of the worst case harmonic (usually the
2nd or 3rd).
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相关代理商/技术参数 |
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| ad9060tz/883b | 制造商:Rochester Electronics LLC 功能描述:10 BIT ECL ADC IC 883 IC - Bulk 制造商:Analog Devices 功能描述: |
| AD-9063 | 制造商:BOTHHAND 制造商全称:Bothhand USA, LP. 功能描述:ADSL CPE SIDE SPLITTER |
| AD9066 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual 6-Bit, 60 MSPS Monolithic A/D Converter |
| AD9066AR | 制造商:Rochester Electronics LLC 功能描述:6B 60MHZ DUAL A/D - Bulk |
| AD9066AR-REEL | 制造商:Rochester Electronics LLC 功能描述:6B 60MHZ DUAL A/D - Tape and Reel |
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