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| 型号： | AD9116BCPZRL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 39/52页 |
| 文件大小： | 0K |
| 描述： | IC DAC DUAL 12BIT LO PWR 40LFCSP |
| 产品培训模块： | Data Converter Fundamentals DAC Architectures |
| 标准包装： | 750 |
| 系列： | TxDAC® |
| 位数： | 12 |
| 数据接口： | 串行 |
| 转换器数目： | 2 |
| 电压电源： | 模拟和数字 |
| 功率耗散（最大）： | 232mW |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 40-LFCSP-VQ（6x6） |
| 包装： | 带卷 (TR) |
| 输出数目和类型： | 4 电流，单极 |
| 采样率（每秒）： | 125M |
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AD9114/AD9115/AD9116/AD9117
Data Sheet
Rev. C | Page 44 of 52
where:
IIREF = VREFIO/IRSET
(4)
IQREF = VREFIO/QRSET
or
IIOUTFS = 32 × VREFIO/IRSET
(5)
IQOUTFS = 32 × VREFIO/QRSET
A differential pair (IOUTP/IOUTN or QOUTP/QOUTN)
typically drives a resistive load directly or via a transformer. If
dc coupling is required, the differential pair (IOUTP/IOUTN or
QOUTP/QOUTN) should be connected to matching resistive
loads, xRLOAD, that are tied to analog common, AVSS. The single-
ended voltage output appearing at the positive and negative nodes is
VIOUTP = IOUTP × IRLOAD
(6)
VQOUTP = QOUTP × QRLOAD
VIOUTN = IOUTN × IRLOAD
(7)
VQOUTN = QOUTN × QRLOAD
To achieve the maximum output compliance of 1 V at the nominal
20 mA output current, IRLOAD = QRLOAD must be set to 50 Ω.
Substituting the values of IOUTP, IOUTN, IxREF, and VIDIFF can
be expressed as
VIDIFF = {(2 × IDAC CODE (2N 1))/2N} ×
(32 × VREFIO/IRSET) × IRLOAD
(8)
Equation 8 highlights some of the advantages of operating the
AD9114/AD9115/AD9116/AD9117 differentially. First, the
differential operation helps cancel common-mode error sources
associated with IOUTP and IOUTN, such as noise, distortion,
and dc offsets. Second, the differential code-dependent current and
subsequent voltage, VIDIFF, is twice the value of the single-ended
voltage output (that is, VIOUTP or VIOUTB), thus providing twice the
signal power to the load. Note that the gain drift temperature
performance for a single-ended output (VIOUTP and VIOUTN) or
differential output of the AD9114/AD9115/AD9116/ AD9117
can be enhanced by selecting temperature tracking resistors for
xRLOAD and xRSET because of their ratiometric relationship, as
shown in Equation 8.
ANALOG OUTPUT
The complementary current outputs in each DAC, IOUTP/
IOUTN and QOUTP/QOUTN, can be configured for single-
ended or differential operation. IOUTP/IOUTN and QOUTP/
QOUTN can be converted into complementary single-ended
voltage outputs, VIOUTP and VIOUTN as well as VQOUTP and VQOUTN via
section by Equation 6 through Equation 8. The differential
voltages, VIDIFF and VQDIFF, existing between VIOUTP and VIOUTN,
and VQOUTP and VQOUTN, can also be converted to a single-ended
voltage via a transformer or a differential amplifier configuration.
The ac performance of the AD9114/AD9115/AD9116/AD9117 is
optimum and is specified using a differential transformer-coupled
output in which the voltage swing at IOUTP and IOUTN is
limited to ±0.5 V. The distortion and noise performance of the
AD9114/AD9115/AD9116/AD9117 can be enhanced when it is
configured for differential operation. The common-mode error
sources of both IOUTP/IOUTN and QOUTP/QOUTN can be
significantly reduced by the common-mode rejection of a
transformer or differential amplifier. These common-mode error
sources include even-order distortion products and noise.
The enhancement in distortion performance becomes more
significant as the frequency content of the reconstructed waveform
increases and/or its amplitude increases. This is due to the first-
order cancellation of various dynamic common-mode distortion
mechanisms, digital feedthrough, and noise. Performing a
differential-to-single-ended conversion via a transformer also
provides the ability to deliver twice the reconstructed signal
power to the load (assuming no source termination). Because
the output currents of IOUTP/IOUTN and QOUTP/QOUTN
are complementary, they become additive when processed
differentially.
SELF-CALIBRATION
The AD9114/AD9115/AD9116/AD9117 have a self-calibration
feature that improves the DNL of the device. Performing a self-
calibration on the device improves device performance in low
frequency applications. The device performance in applications
where the analog output frequencies are above 5 MHz are generally
influenced more by dynamic device behavior than by DNL and,
in these cases, self-calibration is unlikely to produce measurable
benefits. The calibration clock frequency is equal to the DAC clock
divided by the division factor chosen by the DIVSEL value. There
is a fixed pre-divider of 16 and it is multiplied by the DIVSEL,
which has a range of divide by 2 -256. Each calibration clock
cycle is between 32 and 2048 DAC input clock cycles, depending
on the value of DIVSEL[2:0] (Register 0x0E, Bits[2:0]). The
frequency of the calibration clock should be between 0.5 MHz
and 4 MHz for reliable calibrations. Best results are obtained by
setting DIVSEL[2:0] to produce a calibration clock frequency
between these values. Separate self-calibration hardware is
included for each DAC. The DACs can be self-calibrated
individually or simultaneously.
To perform a device self-calibration, use the following procedure:
1. Write 0x00 to Register 0x12. This ensures that the UNCALI
and UNCALQ bits (Bit 1 and Bit 0) are reset.
2. Set up a calibration clock between 0.5 MHz and 4 MHz
using DIVSEL[2:0], and then enable the calibration clock
by setting the CALCLK bit (Register 0x0E, Bit 3).
3. Select the DAC(s) to self-calibrate by setting either Bit 4
(CALSELI) for the I DAC and/or Bit 5 (CALSELQ) for
the Q DAC in Register 0x0E. Note that each DAC contains
independent calibration hardware so that they can be
calibrated simultaneously.
4. Start self-calibration by setting Bit 4 (CALEN) in Register 0x12.
Wait approximately 300 calibration clock cycles.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9116-DPG2-EBZ | 功能描述:IC DAC DUAL 12BIT LO PWR 40LFCSP RoHS:是 类别:编程器，开发系统 >> 评估板 - 数模转换器 (DAC) 系列:TxDAC® 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- DAC 的数量:4 位数:12 采样率（每秒）:- 数据接口:串行，SPI? 设置时间:3µs DAC 型:电流/电压 工作温度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581 |
| AD9116-EBZ | 制造商:Analog Devices 功能描述:DUAL 12 BIT LOW POWER CONVERTER - Boxed Product (Development Kits) |
| AD9117 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual, 8-/10-/12-/14-Bit Low Power Digital-to-Analog Converters |
| AD9117BCPZ | 功能描述:IC DAC DUAL 14BIT LO PWR 40LFCSP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:TxDAC® 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 设置时间:4µs 位数:12 数据接口:串行 转换器数目:2 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 供应商设备封装:8-uMAX 包装:管件 输出数目和类型:2 电压，单极 采样率（每秒）:* 产品目录页面:1398 (CN2011-ZH PDF) |
| AD9117BCPZN | 功能描述:数模转换器- DAC Dual 14B Low Power D-A Converter RoHS:否 制造商:Texas Instruments 转换器数量:1 DAC 输出端数量:1 转换速率:2 MSPs 分辨率:16 bit 接口类型:QSPI, SPI, Serial (3-Wire, Microwire) 稳定时间:1 us 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-14 封装:Tube |
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