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参数资料
| 型号： | AD9216-105PCBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 40/40页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD9216 105MSPS |
| 标准包装： | 1 |
| ADC 的数量： | 2 |
| 位数： | 10 |
| 采样率（每秒）： | 105M |
| 数据接口： | 并联 |
| 输入范围： | 2 Vpp |
| 在以下条件下的电源（标准）： | 300mW @ 105MSPS |
| 工作温度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD9216-105 |
| 已供物品： | 板 |
| 相关产品： | AD9216BCPZRL7-105-ND - IC ADC 10BIT DL 105MSPS 64-LFCSP AD9216BCPZ-105-ND - IC ADC 10BIT DL 105MSPS 64LFCSP AD9216BCPZ-80-ND - IC ADC 10BIT DUAL 80MSPS 64LFCSP AD9216BCPZRL7-80-ND - IC ADC 10BIT DUAL 80MSPS 64LFCSP |
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AD9216
Rev. A | Page 9 of 40
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
INDICATOR
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
AV
DD
CLK_
B
DCS
DFS
PD
WN
_B
OEB_B
DNC
D
0_B
(
L
SB
)
DRGND
DRV
DD
D
1_B
D
2_B
D
3_B
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
AV
DD
CLK_
A
S
HARE
D_
RE
F
M
U
X_SELEC
T
PD
WN
_A
OEB_A
DNC
D
9_A
(
M
SB
)
D
8_A
D
7_A
D
6_A
DRGND
DRV
DD
D
5_A
D
4_A
D
3_A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
AGND
VIN+_A
VIN–_A
AGND
AVDD
REFT_A
REFB_A
VREF
SENSE
REFB_B
REFT_B
AVDD
AGND
VIN–_B
VIN+_B
AGND
D2_A
D1_A
D0_A (LSB)
DNC
DRVDD
DRGND
DNC
D9_B (MSB)
D8_B
D7_B
D6_B
D5_B
D4_B
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
AD9216
TOP VIEW
(Not to Scale)
04775-003
DNC =
DO NOT CONNECT
Figure 3. Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 4, 13, 16
AGND1
Analog Ground.
2
VIN+_A
Analog Input Pin (+) for Channel A.
3
VIN_A
Analog Input Pin () for Channel A.
5, 12, 17, 64
AVDD
Analog Power Supply.
6
REFT_A
Differential Reference (+) for Channel A.
7
REFB_A
Differential Reference () for Channel A.
8
VREF
Voltage Reference Input/Output.
9
SENSE
Reference Mode Selection.
10
REFB_B
Differential Reference () for Channel B.
11
REFT_B
Differential Reference (+) for Channel B.
14
VIN_B
Analog Input Pin () for Channel B.
15
VIN+_B
Analog Input Pin (+) for Channel B.
18
CLK_B
Clock Input Pin for Channel B.
19
DCS
Duty Cycle Stabilizer (DCS) Mode Pin (Active High).
20
DFS
Data Output Format Select Pin. Low for offset binary; high for twos complement.
21
PDWN_B
Power-Down Function Selection for Channel B.
Logic 0 enables Channel B.
Logic 1 powers down Channel B. (Outputs static, not High-Z.)
22
OEB_B
Output Enable for Channel B.
Logic 0 enables Data Bus B.
Logic 1 sets outputs to High-Z.
23 to 26, 39,
42 to 45, 58
DNC
Do Not Connect Pins. Should be left floating.
27, 30 to 38
D0_B (LSB) to
D9_B (MSB)
Channel B Data Output Bits.
28, 40, 53
DRGND
Digital Output Ground.
29, 41, 52
DRVDD
Digital Output Driver Supply. Must be decoupled to DRGND with a minimum 0.1 F capacitor.
Recommended decoupling is 0.1 F capacitor in parallel with 10 F.
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相关代理商/技术参数 |
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|---|---|
| AD9216-40PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:10-Bit, 65/80/105 MSPS Dual A/D Converter |
| AD9216-65 | 制造商:AD 制造商全称:Analog Devices 功能描述:10-Bit, 65/80/105 MSPS Dual A/D Converter |
| AD9216-65PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:10-Bit, 65/80/105 MSPS Dual A/D Converter |
| AD9216-80 | 制造商:AD 制造商全称:Analog Devices 功能描述:10-Bit, 65/80/105 MSPS Dual A/D Converter |
| AD9216-80PCB | 制造商:Analog Devices 功能描述:Evaluation Board With AD9216BCPZ-80 Dual A/D Converter 制造商:Analog Devices 功能描述:EVAL BD W/ AD9216BCPZ-80 DUAL A/D CNVRTR - Trays |
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