参数资料
| 型号： | AD9224ARSZRL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 10/15页 |
| 文件大小： | 0K |
| 描述： | IC ADC 12BIT 40MSPS 28SSOP |
| 标准包装： | 1,500 |
| 位数： | 12 |
| 采样率（每秒）： | 40M |
| 数据接口： | 并联 |
| 转换器数目： | 7 |
| 功率耗散（最大）： | 450mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 28-SSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 2 个单端，单极；1 个差分，单极 |
AD9224
–4–
REV. A
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9224 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS*
With
Pin Name
Respect to
Min
Max
Units
AVDD
AVSS
–0.3
+6.5
V
DRVDD
DRVSS
–0.3
+6.5
V
AVSS
DRVSS
–0.3
+0.3
V
AVDD
DRVDD
–6.5
+6.5
V
REFCOM
AVSS
–0.3
+0.3
V
CLK
AVSS
–0.3
AVDD + 0.3
V
Digital Outputs
DRVSS
–0.3
DRVDD + 0.3
V
VINA, VINB
AVSS
–0.3
AVDD + 0.3
V
VREF
AVSS
–0.3
AVDD + 0.3
V
SENSE
AVSS
–0.3
AVDD + 0.3
V
CAPB, CAPT
AVSS
–0.3
AVDD + 0.3
V
Junction Temperature
+150
°C
Storage Temperature
–65
+150
°C
Lead Temperature (10 sec)
+300
°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum
ratings for extended periods may affect device reliability.
tCL
tCH
tC
tOD
DATA 1
DATA
OUTPUT
INPUT
CLOCK
ANALOG
INPUT
S1
S2
S3
S4
Figure 1. Timing Diagram
PIN CONFIGURATION
28-Lead SSOP
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AD9224
OTR
(MSB) BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
CLK
(LSB) BIT 12
BIT 11
BIT 10
BIT 7
BIT 8
BIT 9
AVDD
AVSS
SENSE
VREF
REFCOM (AVSS)
CAPB
CAPT
DRVDD
DRVSS
AVDD
AVSS
CML
VINA
VINB
PIN FUNCTION DESCRIPTIONS
Pin
Number
Name
Description
1
CLK
Clock Input Pin
2
BIT 12
Least Significant Data Bit (LSB)
3–12
BIT 11–2
Data Output Bit
13
BIT 1
Most Significant Data Bit (MSB)
14
OTR
Out of Range
15, 26
AVDD
+5 V Analog Supply
16, 25
AVSS
Analog Ground
17
SENSE
Reference Select
18
VREF
Input Span Select (Reference I/O)
19
REFCOM
Reference Common
(AVSS)
20
CAPB
Noise Reduction Pin
21
CAPT
Noise Reduction Pin
22
CML
Common-Mode Level (Midsupply)
23
VINA
Analog Input Pin (+)
24
VINB
Analog Input Pin (–)
27
DRVSS
Digital Output Driver Ground
28
DRVDD
+3 V to +5 V Digital Output
Driver Supply
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
AD9224ARS
–40
°C to +85°C
28-Lead Shrink Small Outline (SSOP)
RS-28
AD9224-EB
Evaluation Board
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