参数资料
| 型号： | AD9240AS |
| 厂商： | Analog Devices Inc |
| 文件页数： | 3/24页 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT 10MSPS 44-MQFP |
| 标准包装： | 1 |
| 位数： | 14 |
| 采样率（每秒）： | 10M |
| 数据接口： | 并联 |
| 转换器数目： | 7 |
| 功率耗散（最大）： | 330mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-QFP |
| 供应商设备封装： | 44-MQFP（10x10） |
| 包装： | 托盘 |
| 输入数目和类型： | 2 个单端，单极；1 个差分，单极 |
AD9240
REV.
–11–
Table I. Analog Input Configuration Summary
Input
Input Range (V)
Figure
Connection
Coupling
Span (V)
VINA
1
VINB
1
#
Comments
Single-Ended
DC
2
0 to 2
1
32, 33
Best for stepped input response applications, suboptimum THD
and noise performance, requires
±5 V op amp.
2
× VREF
0 to
VREF
32, 33
Same as above but with improved noise performance due to
2
× VREF
increase in dynamic range. Headroom/settling time requirements
of
±5 V op amp should be evaluated.
5
0 to 5
2.5
32, 33
Optimum noise performance, excellent THD performance. Requires
op amp with VCC > +5 V due to insufficient headroom @ 5 V.
2
× VREF
2.5 – VREF
2.5
39
Optimum THD performance with VREF = 1, noise performance
to
improves while THD performance degrades as VREF increases
2.5 + VREF
to 2.5 V. Single supply operation (i.e., +5 V) for many op amps.
Single-Ended
AC
2 or
0 to 1 or
1 or VREF
34
Suboptimum ac performance due to input common-mode level
2
× VREF
0 to 2
× VREF
not biased at optimum midsupply level (i.e., 2.5 V).
5
0 to 5
2.5
34
Optimum noise performance, excellent THD performance.
2
× VREF
2.5 – VREF
2.5
35
Flexible input range, Optimum THD performance with VREF = 1.
to
Noise performance improves while THD performance degrades as
2.5 + VREF
VREF increases to 2.5 V.
Differential
AC or
2
2 to 3
3 to 2
29–31
Optimum full-scale THD and SFDR performance well beyond the
DC
A/Ds Nyquist frequency.
2
× VREF
2.5 – VREF/2
2.5 + VREF/2
29–31
Same as 2 V to 3 V input range with the exception that full-scale
to
THD and SFDR performance can be traded off for better noise
2.5 + VREF/2
2.5 – VREF/2
performance.
5
1.25 to 3.75
3.75 to 1.25
29–31
Widest dynamic range (i.e., ENOBs) due to optimum noise
performance.
1VINA and VINB can be interchanged if signal inversion is required.
Table II. Reference Configuration Summary
Reference
Input Span (VINA–VINB)
Operating Mode
(V p-p)
Required VREF (V)
Connect
To
INTERNAL
2
1
SENSE
VREF
INTERNAL
5
2.5
SENSE
REFCOM
INTERNAL
2
≤ SPAN ≤ 5 AND
1
≤ VREF ≤ 2.5 AND
R1
VREF AND SENSE
SPAN = 2
× VREF
VREF = (1 + R1/R2)
R2
SENSE AND REFCOM
EXTERNAL
2
≤ SPAN ≤ 51 ≤ VREF ≤ 2.5
SENSE
AVDD
(NONDYNAMIC)
VREF
EXT. REF.
EXTERNAL
2
≤ SPAN ≤ 5
CAPT and CAPB
SENSE
AVDD
(DYNAMIC)
Externally Driven
VREF
REFCOM
EXT. REF. 1
CAPT
EXT. REF. 2
CAPB
B
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| AD9240ASRL | 功能描述:IC ADC 14BIT 10MSPS 44-MQFP RoHS:否 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
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| AD9240ASZRL | 功能描述:IC ADC 14BIT 10MSPS 44-MQFP TR RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
| AD9240EB | 制造商:AD 制造商全称:Analog Devices 功能描述:Complete 14-Bit, 10 MSPS Monolithic A/D Converter |
| AD9240-EB | 制造商:Analog Devices 功能描述: |
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