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| 型号： | AD9272-65EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 37/44页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL AD9272 |
| 设计资源： | Powering AD9272 with ADP5020 Switching Regulator PMU for Increased Efficiency (CN0135) |
| 标准包装： | 1 |
| ADC 的数量： | 8 |
| 位数： | 12 |
| 采样率（每秒）： | 65M |
| 数据接口： | 串行 |
| 输入范围： | 733 mVpp |
| 在以下条件下的电源（标准）： | 1.69W @ 65MSPS |
| 工作温度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD9272 |
| 已供物品： | 板，电源 |
| 相关产品： | AD9272BSVZRL-80-ND - IC ADC ASD OCTAL 80MSPS 100-TQFP AD9272BSVZRL-65-ND - IC ADC ASD OCTAL 65MSPS 100-TQFP AD9272BSVZRL-40-ND - IC ADC ASD OCTAL 40MSPS 100-TQFP AD9272BSVZ-80-ND - IC ADC OCT 12BIT 80MSPS 100-TQFP AD9272BSVZ-65-ND - IC ADC OCT 12BIT 65MSPS 100-TQFP AD9272BSVZ-40-ND - IC ADC OCT 12BIT 40MSPS 100-TQFP |
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AD9272
Rev. C | Page 42 of 44
Addr.
(Hex)
Register Name
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
Default
Value
Default Notes/
Comments
0F
Flex_channel_input
Filter cutoff frequency control
0000 = 1.3 × 1/3 × fSAMPLE
0001 = 1.2 × 1/3 × fSAMPLE
0010 = 1.1 × 1/3 × fSAMPLE
0011 = 1.0 × 1/3 × fSAMPLE (default)
0100 = 0.9 × 1/3 × fSAMPLE
0101 = 0.8 × 1/3 × fSAMPLE
0110 = 0.7 × 1/3 × fSAMPLE
1000 = 1.3 × 1/4.5 × fSAMPLE
1001 = 1.2 × 1/4.5 × fSAMPLE
1010 = 1.1 × 1/4.5 × fSAMPLE
1011 = 1.0 × 1/4.5 × fSAMPLE
1100 = 0.9 × 1/4.5 × fSAMPLE
1101 = 0.8 × 1/4.5 × fSAMPLE
1110 = 0.7 × 1/4.5 × fSAMPLE
X
0x30
Antialiasing filter
cutoff (global).
10
Flex_offset
X
6-bit LNA offset adjustment
10 0000 for LNA bias high, mid-high, mid-low (default)
10 0001 for LNA bias low
0x20
LNA force offset
correction
(local).
11
Flex_gain
X
PGA gain
00 = 21 dB
01 = 24 dB (default)
10 = 27 dB
11 = 30 dB
LNA gain
00 = 15.6 dB
01 = 17.9 dB
10 = 21.3 dB
(default)
0x06
LNA and PGA
gain adjustment
(global).
12
Bias_current
X
1
X
LNA bias
00 = high (default)
01 = mid-high
10 = mid-low
11 = low
0x08
LNA bias current
adjustment
(global).
14
Output_mode
X
0 = LVDS
ANSI-644
(default)
1 = LVDS
low power,
(IEEE
1596.3
similar)
X
Output
invert
1 = on
0 = off
(default)
00 = offset binary
(default)
01 = twos
complement
0x00
Configures the
outputs and the
format of the data
(Bits[7:3] and
Bits[1:0] are global;
Bit 2 is local).
15
Output_adjust
X
Output driver
termination
00 = none (default)
01 = 200 Ω
10 = 100 Ω
11 = 100 Ω
X
DCO±
and
FCO±
2× drive
strength
1 = on
0 = off
(default)
0x00
Determines LVDS
or other output
properties.
Primarily functions
to set the LVDS
span and
common-mode
levels in place of
an external resistor
(Bits[7:1] are global;
Bit 0 is local).
16
Output_phase
X
0011 = output clock phase adjust
(0000 through 1010)
(Default: 180° relative to data edge)
0000 = 0° relative to data edge
0001 = 60° relative to data edge
0010 = 120° relative to data edge
0011 = 180° relative to data edge
0100 = 240° relative to data edge
0101 = 300° relative to data edge
0110 = 360° relative to data edge
0111 = 420° relative to data edge
1000 = 480° relative to data edge
1001 = 540° relative to data edge
1010 = 600° relative to data edge
1011 to 1111 = 660° relative to data edge
0x03
On devices that
use global clock
divide,
determines which
phase of the
divider output is
used to supply
the output clock.
Internal latching
is unaffected.
18
Flex_vref
X
0 =
internal
reference
1 =
external
reference
X
0x00
Select internal
reference
(recommended
default) or
external
reference
(global).
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相关代理商/技术参数 |
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|---|---|
| AD9272-65EBZ1 | 制造商:AD 制造商全称:Analog Devices 功能描述:Octal LNA/VGA/AAF/ADC and Crosspoint Switch |
| AD9272-80KITZ | 制造商:Analog Devices 功能描述:12BIT 80 MSPS OCTAL ADC - Boxed Product (Development Kits) |
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| AD9272BSVZ-40 | 功能描述:IC ADC OCT 12BIT 40MSPS 100-TQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - ADCs/DAC - 专用型 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 类型:数据采集系统（DAS） 分辨率（位）:16 b 采样率（每秒）:21.94k 数据接口:MICROWIRE?，QSPI?，串行，SPI? 电压电源:模拟和数字 电源电压:1.8 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:40-WFQFN 裸露焊盘 供应商设备封装:40-TQFN-EP（6x6） 包装:托盘 |
| AD9272BSVZ-401 | 制造商:AD 制造商全称:Analog Devices 功能描述:Octal LNA/VGA/AAF/ADC and Crosspoint Switch |
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