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参数资料
| 型号： | AD96685BR-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 3/8页 |
| 文件大小： | 0K |
| 描述： | IC COMP SNGL ULTRA-FAST 16-SOIC |
| 标准包装： | 2,500 |
| 类型： | 带锁销 |
| 元件数： | 1 |
| 输出类型： | 补充型，ECL，开路发射极 |
| 电压 - 输入偏移（最小值）： | 2mV @ -5.2V，5V |
| 电流 - 输入偏压（最小值）： | 10µA @ -5.2V，5V |
| 电流 - 输出（标准）： | 30mA |
| 电流 - 静态（最大值）： | 18mA，36mA |
| CMRR, PSRR（标准）： | 90dB CMRR，70dB PSRR |
| 传输延迟（最大）： | 3.5ns |
| 工作温度： | -25°C ~ 85°C |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 安装类型： | 表面贴装 |
| 包装： | 带卷 (TR) |
REV. D
–3–
AD96685/AD96687
ABSOLUTE MAXIMUM RATINGS
1
Positive Supply Voltage (+VS) . . . . . . . . . . . . . . . . . . . . . 6.5 V
Negative Supply Voltage (–VS) . . . . . . . . . . . . . . . . . . . –6.5 V
Input Voltage Range
2 . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±5 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Latch Enable Voltage . . . . . . . . . . . . . . . . . . . . . . . . –VS to 0 V
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
3
AD96685BR/AD96687BQ/BR/BP . . . . . . . –25
°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –55
°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 175
°C
Lead Soldering Temperature (10 sec) . . . . . . . . . . . . . . 300
°C
NOTES
1Absolute maximum ratings are limiting values, may be applied individually, and
beyond which serviceability of the circuit may be impaired. Functional operation
under any of these conditions is not necessarily implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2Under no circumstances should the input voltages exceed the supply voltages.
3Typical thermal impedances . . .
AD96685 SOIC
qJA = 170
°C/W; q
JC = 60
°C/W
AD96687 Ceramic
qJA = 115
°C/W; q
JC = 57
°C/W
AD96687 SOIC
qJA = 92
°C/W; q
JC = 47
°C/W
AD96687 PLCC
qJA = 81
°C/W; q
JC = 45
°C/W
EXPLANATION OF TEST LEVELS
Test Level
I
– 100% production tested.
II – 100% production tested at 25
°C, and sample tested at
specified temperatures.
III – Sample tested only.
IV – Parameter is guaranteed by design and characterization
testing.
V – Parameter is a typical value only.
VI – All devices are 100% production tested at 25
°C; 100%
production tested at temperature extremes for extended
temperature devices; sample tested at temperature ex-
tremes for commercial/industrial devices.
FUNCTIONAL DESCRIPTION
Pin Name
Description
+VS
Positive supply terminal, nominally 5.0 V.
NONINVERTING INPUT
Noninverting analog input of the differential input stage. The NONINVERTING INPUT must be
driven in conjunction with the INVERTING INPUT.
INVERTING INPUT
Inverting analog input of the differential input stage. The INVERTING INPUT must be driven in
conjunction with the NONINVERTING INPUT.
LATCH ENABLE
In the “compare” mode (logic HIGH), the output will track changes at the input of the compara-
tor. In the “latch” mode (logic LOW), the output will reflect the input state just prior to the
comparator being placed in the “latch” mode. LATCH ENABLE must be driven in conjunction
with LATCH ENABLE for the AD96687.
LATCH ENABLE
In the “compare” mode (logic LOW), the output will track changes at the input of the comparator.
In the “latch” mode (logic HIGH), the output will reflect the input state just prior to the comparator
being placed in the “latch” mode. LATCH ENABLE must be driven in conjunction with
LATCH ENABLE for the AD96687.
–VS
Negative supply terminal, nominally –5.2 V.
Q
One of two complementary outputs. Q will be at logic HIGH if the analog voltage at the
NONINVERTING INPUT is greater than the analog voltage at the INVERTING INPUT (pro-
vided the comparator is in the “compare” mode). See LATCH ENABLE and LATCH ENABLE
(AD96687 only) for additional information.
Q
One of two complementary outputs. Q will be at logic LOW if the analog voltage at the
NONINVERTING INPUT is greater than the analog voltage at the INVERTING INPUT
(provided the comparator is in the “compare” mode). See LATCH ENABLE and LATCH ENABLE
(AD96687 only) for additional information.
GROUND 1
One of two grounds, but primarily associated with the digital ground. Both grounds should be
connected together near the comparator.
GROUND 2
One of two grounds, but primarily associated with the analog ground. Both grounds should be
connected together near the comparator.
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相关代理商/技术参数 |
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|---|---|
| AD96685BRZ | 功能描述:IC COMP SNGL ULTRA-FAST 16-SOIC RoHS:是 类别:集成电路 (IC) >> 线性 - 比较器 系列:- 标准包装:1 系列:- 类型:通用 元件数:1 输出类型:CMOS，开路集电极，TTL 电压 - 电源，单路/双路(±):2.7 V ~ 5.5 V 电压 - 输入偏移（最小值）:7mV @ 5V 电流 - 输入偏压（最小值）:0.25µA @ 5V 电流 - 输出（标准）:84mA @ 5V 电流 - 静态（最大值）:120µA CMRR, PSRR（标准）:- 传输延迟（最大）:600ns 磁滞:- 工作温度:-40°C ~ 85°C 封装/外壳:SC-74A，SOT-753 安装类型:表面贴装 包装:剪切带 (CT) 产品目录页面:1268 (CN2011-ZH PDF) 其它名称:*LMV331M5*LMV331M5/NOPBLMV331M5CT |
| AD96685BRZ-REEL | 功能描述:IC COMP SNGL ULTRA-FAST 16-SOIC RoHS:是 类别:集成电路 (IC) >> 线性 - 比较器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
| AD96685TE | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog Comparator |
| AD96685TE/883B | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| AD96685TH | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog Comparator |
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