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参数资料
| 型号： | AD9765-EBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 13/44页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD9765 |
| 产品培训模块： | DAC Architectures |
| 标准包装： | 1 |
| 系列： | TxDAC+® |
| DAC 的数量： | 2 |
| 位数： | 12 |
| 采样率（每秒）： | 125M |
| 数据接口： | 并联 |
| 设置时间： | 35ns |
| DAC 型： | 电流 |
| 工作温度： | -40°C ~ 85°C |
| 已供物品： | 板 |
| 已用 IC / 零件： | AD9765 |
| 相关产品： | AD9765ASTZRL-ND - IC DAC 12BIT DUAL 125MSPS 48LQFP AD9765ASTZ-ND - IC DAC 12BIT DUAL 125MSPS 48LQFP |
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AD9763/AD9765/AD9767
Data Sheet
Rev. G | Page 20 of 44
TERMINOLOGY
Linearity Error (Integral Nonlinearity or INL)
Linearity error is defined as the maximum deviation of the
actual analog output from the ideal output, determined by a
straight line drawn from zero to full scale.
Differential Nonlinearity (DNL)
DNL is the measure of the variation in analog value, normalized to
full scale, associated with a 1 LSB change in digital input code.
Monotonicity
A DAC is monotonic if the output either increases or remains
constant as the digital input increases.
Offset Error
Offset error is the deviation of the output current from the ideal of
zero. For IOUTA, 0 mA output is expected when the inputs are all 0s.
For IOUTB, 0 mA output is expected when all inputs are set to 1s.
Gain Error
Gain error is the difference between the actual and ideal output
spans. The actual span is determined by the output when all inputs
are set to 1s minus the output when all inputs are set to 0s.
Output Compliance Range
The output compliance range is the range of allowable voltage at
the output of a current-output DAC. Operation beyond the
maximum compliance limits may cause either output stage
saturation or breakdown resulting in nonlinear performance.
Temperature Drift
Temperature drift is specified as the maximum change from the
ambient (25°C) value to the value at either TMIN or TMAX. For
offset and gain drift, the drift is reported in part per million (ppm)
of full-scale range (FSR) per degree Celsius. For reference drift,
the drift is reported in ppm per degree Celsius (ppm/°C).
Power Supply Rejection (PSR)
PSR is the maximum change in the full-scale output as the
supplies are varied from nominal to minimum and maximum
specified voltages.
Settling Time
Settling time is the time required for the output to reach and
remain within a specified error band about its final value,
measured from the start of the output transition.
Glitch Impulse
Asymmetrical switching times in a DAC give rise to undesired
output transients that are quantified by a glitch impulse. It is
specified as the net area of the glitch in picovolts per second (pV-s).
Spurious-Free Dynamic Range (SFDR)
The difference, in decibels (dB), between the rms amplitude of
the output signal and the peak spurious signal over the specified
bandwidth.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of the first six harmonic
components to the rms value of the measured input signal.
It is expressed as a percentage or in decibels (dB).
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9767 | 制造商:AD 制造商全称:Analog Devices 功能描述:14-Bit, 125 MSPS Dual TxDAC+ D/A Converter |
| AD9767AST | 制造商:Analog Devices 功能描述:DAC 2-CH Segment 14-bit 48-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:14-BIT, 125 MSPS DUAL TXDAC+ - Tape and Reel 制造商:Analog Devices 功能描述:IC 14-BIT DAC |
| AD9767ASTRL | 制造商:Analog Devices 功能描述:DAC 2-CH Segment 14-bit 48-Pin LQFP T/R 制造商:Rochester Electronics LLC 功能描述:14-BIT, 125 MSPS DUAL TXDAC+ - Tape and Reel |
| AD9767ASTZ | 功能描述:IC DAC 14BIT DUAL 125MSPS 48LQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 数模转换器 系列:TxDAC+® 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 设置时间:4µs 位数:12 数据接口:串行 转换器数目:2 电压电源:单电源 功率耗散（最大）:- 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-TSSOP，8-MSOP（0.118"，3.00mm 宽） 供应商设备封装:8-uMAX 包装:管件 输出数目和类型:2 电压，单极 采样率（每秒）:* 产品目录页面:1398 (CN2011-ZH PDF) |
| AD9767ASTZ | 制造商:Analog Devices 功能描述:D/A CONVERTER (D-A) IC ((NW)) |
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