参数资料
型号: AD9944KCPZRL
厂商: Analog Devices Inc
文件页数: 15/20页
文件大小: 0K
描述: IC CCD SIGNAL PROCESSOR 32-LFCSP
标准包装: 5,000
类型: CCD 信号处理器,12 位
输入类型: 逻辑
输出类型: 逻辑
接口: 3 线串口
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘,CSP
供应商设备封装: 32-LFCSP-VQ(5x5)
包装: 带卷 (TR)
AD9943/AD9944
Data Sheet
Parameter
Min
Typ
Max
Unit
Conditions
A/D CONVERTER
Resolution
10
Bits
Differential Nonlinearity (DNL)
±0.3
LSB
No Missing Codes
Guaranteed
Data Output Coding
Straight binary
Full-Scale Input Voltage
2.0
V
VOLTAGE REFERENCE
Reference Top Voltage (REFT)
2.0
V
Reference Bottom Voltage (REFB)
1.0
V
SYSTEM PERFORMANCE
Specifications include entire signal chain.
Gain Range
Low Gain (VGA Code = 0)
5.3
dB
Maximum Gain (VGA Code = 1023)
40
41.5
dB
Gain Accuracy
±1
dB
Peak Nonlinearity 500 mV Input Signal
0.1
%
12 dB gain applied.
Total Output Noise
0.3
LSB rms
AC grounded input, 6 dB gain applied.
Power Supply Rejection (PSR)
50
dB
Measured with step change on supply.
1
Input signal characteristics defined as follows:
AD9944 SYSTEM SPECIFICATIONS
TMIN to TMAX, AVDD = DVDD = DRVDD = 3 V, fSAMP = 25 MHz, unless otherwise noted.
Table 3.
Parameter
Min
Typ
Max
Unit
Conditions
CDS
Maximum Input Range before Saturation1
1.0
V p-p
Allowable CCD Reset Transient1
500
mV
See input waveform in footnote.
Maximum CCD Black Pixel Amplitude1
100
mV
VARIABLE GAIN AMPLIFIER (VGA)
Gain Control Resolution
1024
Steps
Gain Monotonicity
Guaranteed
Gain Range
Minimum Gain
5.3
dB
See Figure 13 for VGA gain curve.
Maximum Gain
40
41.5
dB
gain equation.
BLACK LEVEL CLAMP
Clamp Level Resolution
256
Steps
Clamp Level
Measured at ADC output.
Minimum Clamp Level
0
LSB
Maximum Clamp Level
255
LSB
A/D CONVERTER
Resolution
12
Bits
Differential Nonlinearity (DNL)
±0.4
LSB
No Missing Codes
Guaranteed
Data Output Coding
Straight binary
Full-Scale Input Voltage
2.0
V
100mV TYP
OPTICAL BLACK PIXEL
500mV TYP
RESET TRANSIENT
1V TYP
INPUT SIGNAL RANGE
02905-B-002
Rev. C | Page 4 of 20
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