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| 型号： | ADA4853-1AKSZ-R2 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 20/21页 |
| 文件大小： | 0K |
| 描述： | IC OPAMP VF R-R 100MHZ SC70-6 |
| 标准包装： | 1 |
| 应用： | 电压反馈 |
| 输出类型： | 满摆幅 |
| 电路数： | 1 |
| -3db带宽： | 100MHz |
| 转换速率： | 120 V/µs |
| 电流 - 电源： | 1.4mA |
| 电流 - 输出 / 通道： | 160mA |
| 电压 - 电源，单路/双路(±)： | 2.65 V ~ 5 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-TSSOP，SC-88，SOT-363 |
| 供应商设备封装： | SC-70-6 |
| 包装： | 标准包装 |
| 产品目录页面： | 768 (CN2011-ZH PDF) |
| 其它名称： | ADA4853-1AKSZ-R2DKR |
ADA4853-1/ADA4853-2/ADA4853-3
Rev. F | Page 7 of 20
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Rating
Supply Voltage
5.5 V
Power Dissipation
Common-Mode Input Voltage
V
S 0.2 V to +VS 1.2 V
Differential Input Voltage
±V
S
Storage Temperature Range
65°C to +125°C
Operating Temperature Range
6-Lead SC70
40°C to +85°C
16-Lead LFCSP_VQ
40°C to +105°C
14-Lead TSSOP
40°C to +105°C
Lead Temperature
JEDEC J-STD-20
Junction Temperature
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, θJA is
specified for the device soldered in the circuit board for
surface-mount packages.
Table 4.
Package Type
θ
JA
Unit
6-Lead SC70
430
°C/W
16-Lead LFCSP_VQ
63
°C/W
14-Lead TSSOP
120
°C/W
Maximum Power Dissipation
The maximum safe power dissipation for the ADA4853-1/
ADA4853-2/ADA4853-3 is limited by the associated rise in
junction temperature (TJ) on the die. At approximately 150°C,
which is the glass transition temperature, the plastic changes its
properties. Even temporarily exceeding this temperature limit
can change the stresses that the package exerts on the die,
permanently shifting the parametric performance of the
amplifiers. Exceeding a junction temperature of 150°C for an
extended period can result in changes in silicon devices,
potentially causing degradation or loss of functionality.
The power dissipated in the package (PD) for a sine wave and a
resistor load is the total power consumed from the supply
minus the load power.
PD = Total Power Consumed Load Power
(
)
L
OUT
CURRENT
SUPPLY
VOLTAGE
SUPPLY
D
R
V
I
V
P
2
–
×
=
RMS output voltages should be considered.
Airflow increases heat dissipation, effectively reducing θJA.
In addition, more metal directly in contact with the package
leads and through holes under the device reduces θJA.
Figure 6 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 6-lead SC70
(430°C/W), the 14-lead TSSOP (120°C/W), and the 16-lead
LFCSP_VQ (63°C/W) on a JEDEC standard 4-layer board. θJA
values are approximations.
3.0
0
125
105
85
65
45
25
5
–15
–35
–55
AMBIENT TEMPERATURE (°C)
MA
XI
MU
M
PO
W
ER
D
ISSI
PA
T
IO
N
(W
)
2.5
2.0
1.5
1.0
0.5
SC70
TSSOP
LFCSP
05884-
059
Figure 6. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
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