参数资料
型号: ADA4922-1ACPZ-RL7
厂商: Analog Devices Inc
文件页数: 6/20页
文件大小: 0K
描述: IC ADC DRVR 18BIT HV DIFF 8LFCSP
标准包装: 1
类型: ADC 驱动器
应用: 数据采集
安装类型: 表面贴装
封装/外壳: 8-VFDFN 裸露焊盘,CSP
供应商设备封装: 8-LFCSP-VD(3x3)
包装: 标准包装
其它名称: ADA4922-1ACPZ-RL7DKR
ADA4922-1
Rev. 0 | Page 14 of 20
THEORY OF OPERATION
The ADA4922-1 is dual amplifier that has been optimized to
drive a differential ADC from a single-ended input source with
a minimum number of external components (see Figure 41).
R
IN
OUT+
OUT–
REF
05681-002
Figure 41. Functional Diagram
The differential output voltage is defined as
VO, dm = VOUT+ VOUT
(1)
Each amplifier in Figure 41 is identical, and the value of Resistor R
is set at 600 Ω, yielding an optimal trade-off between output
differential noise, internal power dissipation, and overall
system linearity. For basic operation, the REF input is tied to
the midswing level of the input signal, which is often midsupply.
The input signal (referenced to REF) produces a differential
output signal with an overall gain of +2. Figure 42 shows typical
operation on ±12 V supplies with the source referenced to 0 V
and the REF pin tied to 0 V.
20
–10
0
50
05681-003
TIME (
μs)
VOLTAGE
(V)
10
0
–10
–20
10
5
0
–5
515
10
20
25
30
35
40
45
OUT+
OUT–
REF
VIN
Figure 42. Typical Input/Output Response—Centered Reference
If an application uses an input midswing voltage other than
midsupply, the REF pin needs to be offset to the input midswing
level to obtain outputs that do not exhibit a differential offset
(see Figure 43). If the voltage applied to the REF pin is different
from the midswing level of the input signal, a dc offset is
created between outputs VOUT+ and VOUT. Figure 44 illustrates
this condition when the input signal is referenced to a positive
level, and the REF pin is connected to 0 V.
10
–2.5
0
50
05681-004
TIME (
μs)
VOLTAGE
(V)
5
0
–5
–10
10
5
0
515
10
20
25
30
35
40
45
OUT+
OUT–
REF
VIN
Figure 43. Typical Input/Output Response—Equal Input/Reference
20
–10
0
50
05681-005
TIME (
μs)
VOLTAGE
(V)
15
10
5
0
–5
10
5
0
–5
515
10
20
25
30
35
40
45
OUT+
OUT–
REF
VIN
Figure 44. Typical Input/Output Response—Unequal Input/Reference
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