参数资料
| 型号： | ADATE206BSVZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 2/16页 |
| 文件大小： | 0K |
| 描述： | IC DCL DUAL 500MHZ ATE 100TQFP |
| 标准包装： | 1 |
| 类型： | 有源负载（DCL），比较器，驱动器 |
| 应用： | 自动测试设备 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-TQFP 裸露焊盘 |
| 供应商设备封装： | 100-TQFP-EP（14x14） |
| 包装： | 管件 |
ADATE206
Rev. A | Page 10 of 16
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VCOM_1
Commutation Reference Voltage.
2
GNDREF_1
Reference GND for VIOL, VIOH.
3
VIOH_1
Program Voltage for IOH (Sink).
4
VIOL_1
Program Voltage for IOL (Source).
5, 12, 20, 21, 36,
40, 55, 56, 64, 71,
76, 79, 83, 93, 97,
100
GND
Device Ground.
6
D_INV_1
Driver Invert.
7
VIT_1
Driver Term Voltage Reference.
8
VIL_1
Driver Low Voltage Reference.
9
VIH_1
Driver High Voltage Reference.
10
CLAMPL_1
Low Clamp.
11
CLAMPH_1
High Clamp.
13
CLLM_1
Comparator Low Leakage Mode.
14
LDEN_1
Determines Whether LD Responds to DR_EN_1 or is Disabled (see Table 4).
15
VTEN_1
Low Speed Control Signal. When high, DR_EN_1 forces driver output to VIT. Otherwise, DR_EN_1
forces driver to high impedance (see Table 4).
16, 17, 33, 43, 59,
60, 84, 87, 92
VEE
Negative Power Supply.
18 19, 57, 58, 77,
78, 89, 98, 99
VCC
Positive Power Supply.
22
DR_DATA_P_1
High Speed Data Inputs. Sets high/low state of driver output (see Table 4).
23
DR_DATA_P_T_1
Termination Resistor for HS Inputs. Opposite end of each 50 Ω termination resistor goes to the
appropriate signal.
24
DR_DATA_N_T_1
Termination Resistors for HS Inputs. Opposite end of each 50 Ω termination resistor goes to the
appropriate signal.
25
DR_DATA_N_1
Complement of DR_DATA_P_1.
26
DR_EN_P_1
High Speed Enable Inputs. Multifunction depending on status of VTEN_1 and LDEN_1. Causes driver
to enter/leave inhibit; driver to enter/leave termination mode; load to leave/enter inhibit
(see Table 4).
27
DR_EN_P_T_1
Termination Resistor for HS Inputs. Opposite end of each 50 Ω termination resistor goes to the
appropriate signal.
28
DR_EN_N_T_1
Termination Resistor for HS Inputs. Opposite end of each 50 Ω termination resistor goes to the
appropriate signal.
29
DR_EN_N_1
Complement of DR_EN_P_1.
30, 46
NC
No Connect.
31
COMP_H_P_1
High Comparator Output.
32
COMP_H_N_1
Complement of COMP_H_P_1.
34
COMP_L_P_1
Low Comparator Output.
35
COMP_L_N_1
Complement of COMP_L_P_1.
37, 39
SLEW1, SLEW0
Logic Signals Controlling Driver Slew Rates for Both Drivers. 00 codes for maximum slew voltage; 11
codes for minimum slew voltage.
38
CMOS_VDD
CMOS Supply (Internal ÷ 2 = Single-Ended Logic Reference).
41
COMP_L_N_2
Complement of COMP_L_P_1.
42
COMP_L_P_2
Low Comparator Output.
44
COMP_H_N_2
Complement of COMP_H_P_1.
45
COMP_H_P_2
High Comparator Output.
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