参数资料
型号: ADATE302-02BBCZ
厂商: Analog Devices Inc
文件页数: 37/58页
文件大小: 0K
描述: IC DCL ATE 500MHZ DUAL 84CSPBGA
标准包装: 1
类型: DCL
应用: 自动测试设备
安装类型: 表面贴装
封装/外壳: 84-TFBGA,CSPBGA
供应商设备封装: 84-CSPBGA(9x9)
包装: 托盘
ADATE302-02
Rev. A | Page 42 of 58
READ OPERATION
The read operation is a two-stage operation. First, a word is
shifted in, specifying which register to read. CS is deasserted for
three clock cycles, and then a second word is shifted in to get
the readback data. This second word can be either another
operation or an NOP address. If another operation is shifted in,
it needs to shift in at least eight bits of data to read back the
previous specified data. The NOP address can be used for this
read if there is no need to write/read another register. It is
strongly recommended that the NOP address be used for all
reads for clarity of operations.
Any register read that is less than 16 bits has zeros filled in the
top bits to make it a 16-bit word.
07
27
8-
011
X
READ INSTRUCTION
NOP
X
READ DATA
X
SCLK
INPUT
SDIN
INPUT
SDOUT
OUTPUT
CS
INPUT
Figure 84. SPI Read Overview
0
72
78
-012
X
DATA[15:0], VALUE IS A DON’T CARE
0
25
24
23
22
21
20
19
18
17
16
15
14
13
12
CH[1]
X
R/W
CH[0]
ADDR[4] ADDR[3] ADDR[2] ADDR[1] ADDR[0]
SCLK
INPUT
SDIN
INPUT
SDOUT
OUTPUT
CS
INPUT
Figure 85. SPI Read—Details of Read Request
07
27
8-
01
3
X
DATA[15:0], VALUE IS A DON’T CARE
0
25
24
23
22
21
20
19
18
17
16
15
14
13
12
CH[1]
RDATA IS THE REGISTER VALUE BEING READ.
RDATA[15]
RDATA[2]
RDATA[1]
RDATA[0]
RDATA[14]
X
R/W = 1
ADDR[4:0] = 0x00 (NOP)
CH[0]
SCLK
INPUT
SDIN
INPUT
SDOUT
OUTPUT
CS
INPUT
Figure 86. SPI Read—Details of Read Out
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