参数资料
型号: ADC0800PCD
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: ADC
英文描述: ADC0800 8-Bit A/D Converter
中文描述: 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP18
封装: HERMETIC SEALED, DIP-18
文件页数: 2/10页
文件大小: 166K
代理商: ADC0800PCD
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage (V
DD
)
Supply Voltage (V
GG
)
Voltage at Any Input
V
SS
b
22V
V
SS
b
22V
V
SS
a
0.3V to V
SS
b
22V
Input Current at Any Pin (Note 2)
5 mA
Package Input Current (Note 2)
20 mA
Power Dissipation (Note 3)
875 mW
ESD Susceptibility (Note 4)
500V
150
§
C
300
§
C
Storage Temperature
Lead Temperature (Soldering, 10 sec.)
Operating Ratings
(Note 1)
Temperature Range
ADC0800PD
ADC0800PCD
T
MIN
s
T
A
s
T
MAX
b
55
§
C
T
A
s
a
125
C
0
§
C
s
T
A
s
a
70
§
C
Electrical Characteristics
These specifications apply for V
SS
e
5.0 V
DC
, V
GG
eb
12.0 V
DC
, V
DD
e
0 V
DC
, a reference voltage of 10.000 V
DC
across the
on-chip R-network (V
R-NETWORK TOP
e
5.000 V
DC
and V
R-NETWORK BOTTOM
eb
5.000 V
DC
), and a clock frequency of 800
kHz. For all tests, a 475
X
resistor is used from pin 5 to V
R-NETWORK BOTTOM
e b
5 V
DC
. Unless otherwise noted, these
specifications apply over an ambient temperature range of
b
55
C to
a
125
C for the ADC0800PD and 0
§
C to
a
70
§
C for the
ADC0800PCD.
Parameter
Conditions
Min
Typ
Max
Units
Non-Linearity
T
A
e
25
§
C, (Note 8)
Over Temperature, (Note 8)
g
1
g
2
LSB
LSB
Differential Non-Linearity
g
(/2
LSB
Zero Error
g
2
LSB
Zero Error Temperature Coefficient
(Note 9)
0.01
%/
§
C
Full-Scale Error
g
2
LSB
Full-Scale Error Temperature Coefficient
(Note 9)
0.01
%/
§
C
Input Leakage
1
m
A
Logical ‘‘1’’ Input Voltage
All Inputs
V
SS
b
1.0
V
SS
V
Logical ‘‘0’’ Input Voltage
All Inputs
V
GG
V
SS
b
4.2
V
Logical Input Leakage
T
A
e
25
§
C, All Inputs, V
IL
e
V
SS
b
10V
All Outputs, I
OH
e
100
m
A
All Outputs, I
OL
e
1.6 mA
T
A
e
25
§
C, All Outputs, V
OL
e
V
SS
@
10V
0
§
C
s
T
A
s
a
70
§
C
b
55
§
C
s
T
A
s
a
125
§
C
1
m
A
Logical ‘‘1’’ Output Voltage
2.4
V
Logical ‘‘0’’ Output Voltage
0.4
V
Disabled Output Leakage
2
m
A
Clock Frequency
50
100
800
500
kHz
kHz
Clock Pulse Duty Cycle
40
60
%
TRI-STATE Enable/Disable Time
1
m
s
Start Conversion Pulse
(Note 10)
1
3
(/2
Clock
Periods
Power Supply Current
T
A
e
25
§
C
20
mA
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its specified operating conditions.
Note 2:
When the input voltage (V
IN
) at any pin exceeds the power supply rails (V
IN
k
V
b
or V
IN
l
V
a
) the absolute value of current at that pin should be limited
to 5 mA or less. The 20 mA package input current limits the number of pins that can exceed the power supply boundaries with a 5 mA current limit to four.
Note 3:
The maximum power dissipation must be derated at elevated temperatures and is dictated by T
JMAX
,
i
JA
, and the ambient temperature, T
A
. The maximum
allowable power dissipation at any temperature is P
D
e
(T
JMAX
b
T
A
)/
i
JA
or the number given in the Absolute Maximum Ratings, whichever is lower. For this
device, T
JMAX
e
125
§
C, and the typical junction-to-ambient thermal resistance of the ADC0800PD and ADC0800PCD when board mounted is 66
§
C/W.
Note 4:
Human body model, 100 pF discharged through a 1.5 k
X
resistor.
Note 5:
Typicals are at 25
§
C and represent most likely parametric norm.
Note 6:
Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 7:
Design limits are guaranteed but not 100% tested. These limits are not used to calculate outgoing quality levels.
Note 8:
Non-linearity specifications are based on best straight line.
Note 9:
Guaranteed by design only.
Note 10:
Start conversion pulse duration greater than 3
(/2
clock periods will cause conversion errors.
2
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