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参数资料
| 型号： | ADC0852CCN |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | ADC |
| 英文描述： | Multiplexed Comparator with 8-Bit Reference Divider |
| 中文描述： | 8-BIT COMPARATOR, ONE BIT ADC, SERIAL ACCESS, PDIP8 |
| 封装： | PLASTIC, DIP-8 |
| 文件页数： | 10/20页 |
| 文件大小： | 327K |
| 代理商： | ADC0852CCN |
Functional Description
(Continued)
In actual practice, the devices used in the ADC0852/4 are a
simple but important expansion of the basic comparator de-
scribed above. As shown in Figure 4c, multiple differential
comparisons can be made. In this circuit, the feedback
switch and one input switch on each capacitor (A switches)
are closed in the first cycle. Then the other input on each
capacitor is connected while all of the first switches are
opened. The change in voltage at the inverter’s input, as a
result of the change in charge on each input capacitor (C1,
C2), will now depend on both input signal differences.
1.2 Input Sampling and Response Time
The input phases of the comparator relate to the device
clock (CLK) as shown in Figure 5. Because the comparator
is a sampling device, its response characteristics are some-
what different from those of linear comparators. The V
IN
(
a
)
input is sampled first (CLK high) followed by V
IN
(
b
) (CLK
low). The output responds to those inputs, one half cycle
later, on CLK’s falling edge.
The comparator’s response time to an input step is depen-
dent on the step’s phase relation to the CLK signal. If an
input step occurs too late to influence the most imminent
comparator decision, one more CLK cycle will pass before
the output is correct. In effect, the response time for the
V
IN
(
a
) input has a minimum of 1 CLK cycle
a
1
m
S and a
maximum of 2 CLK cycles
a
1
m
S. The V
IN
(
b
) input’s delay
will range from 1/2 CLK cycle
a
1
m
S to 1.5 CLK cycles
a
1
m
S since it is sampled after V
IN
(
a
).
The sampled inputs also affect the device’s response to
pulsed signals. As shown in the shaded areas in Figure 5,
pulses that rise and/or fall near the latter part of a CLK half-
cycle may be ignored.
1.3 Input Multiplexer
A unique input multiplexing scheme has been utilized to pro-
vide multiple analog channels with software-configurable
single-ended, differential, or pseudo-differential operation.
The analog signal conditioning required in transducer-input
and other types of data acquisition systems is significantly
simplified with this type of input flexibility. One device pack-
age can now handle ground referenced inputs as well as
signals with some arbitrary reference voltage.
On the ADC0854, the ‘‘common’’ pin (pin 6) is used as the
‘‘
b
’’ input for all channels in single-ended mode. Since this
input need not be at analog ground, it can be used as the
common line for pseudo-differential operation. It may be tied
to a reference potential that is common to all inputs and
within the input range of the comparator. This feature is
especially useful in single-supply applications where the an-
alog circuitry is biased to a potential other than ground.
A particular input configuration is assigned during the MUX
addressing sequence which occurs prior to the start of a
comparison. The MUX address selects which of the analog
channels is to be enabled, what the input mode will be, and
the input channel polarity. One limitation is that differential
inputs are restricted to adjacent channel pairs. For example,
channel 0 and 1 may be selected as a differential pair but
they cannot act differentially with any other channel.
The channel and polarity selection is done serially via the DI
input. A complete listing of the input configurations and cor-
responding MUX addresses for the ADC0852 and ADC0854
is shown in tables I and II. Figure 6 illustrates the analog
connections for the various input options.
The analog input voltage for each channel can range from
50 mV below ground to 50 mV above V
CC
(typically 5V)
without degrading accuracy.
TL/H/5521–13
FIGURE 5. Analog Input Timing
10
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PDF描述 |
|---|---|
| ADC0858BIN | 8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0858BIV | 8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0851 | 8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0851BIN | 8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0851BIV | 8-Bit Analog Data Acquisition and Monitoring Systems |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADC0852CCN/A+ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog Comparator |
| ADC0852CCN/B+ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog Comparator |
| ADC0854 | 制造商:未知厂家 制造商全称:未知厂家 功能描述: |
| ADC0854BCJ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog Comparator |
| ADC0854BCJ/A+ | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Analog Comparator |
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