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参数资料
| 型号： | ADC10030CIVT |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | ADC |
| 英文描述： | 10-Bit, 30 MSPS, 125 mW A/D Converter with Internal Sample and Hold |
| 中文描述： | 1-CH 10-BIT RESISTANCE LADDER ADC, PARALLEL ACCESS, PQFP32 |
| 封装： | TQFP-32 |
| 文件页数： | 7/17页 |
| 文件大小： | 417K |
| 代理商： | ADC10030CIVT |
Reference, DC, and Logic Electrical Characteristics
(Continued)
The following specifications apply for V
= +5.0V
DC
, V
= +5.0V
, V
I/O = +5.0V
DC
, V
REF
+ = +3.5V
, V
=
+1.75V
DC
, C
L
= 20 pF, f
CLK
= 27 MHz, R
S
= 50
.
Boldface limits apply for T
A
= T
MIN
MAX
:
all other limits T
A
= 25C
(Note 7)
Symbol
Parameter
Conditions
Typical
(Note 8)
Limits
(Note 9)
Units
Power Supply Characteristics
P
D
Power Consumption
PD = LOW
PD = HIGH
PD = LOW, f
CLK
= 30 MHz
121
3.5
125
130
mW(max)
mW
AC Electrical Characteristics
The following specifications apply for V
= +5.0V
DC
, V
= +5.0V
, V
I/O = 5.0V
, V
REF
+ = +3.5V
, V
=
+1.75V
DC
, C
L
= 20 pF, f
CLK
= 27 MHz, R
S
= 50
.
Boldface limits apply for T
A
= T
MIN
MAX
:
all other limits T
A
= 25C
(Note 7)
Symbol
Parameter
Conditions
Typical
(Note 8)
27
1
Limits
(Note 9)
30
Units
(Limits)
MHz
MHz
ns(min)
ns(min)
%(min)
%(max)
Clock Cycles
ns(max)
ns
ns(max)
ns
f
CLK1
f
CLK2
t
CH
t
CL
Maximum Clock Frequency
Minimum Clock Frequency
Clock High Time
Clock Low Time
16.5
16.5
45
55
2.0
4
Duty Cycle
50
Pipeliine Delay (Latency)
Clock Input Rise and Fall Time
Output Rise and Fall Times
Fall of CLK to Data Valid
Output Data Hold Time
t
rc
, t
fc
t
r
, t
f
t
OD
t
OH
10
20
12
25
t
DIS
Rising Edge of OE to
TRI-STATE
From Output High,
2 k
to Ground
From Output Low, 2
k
to V
D
I/O
25
ns
18
ns
t
EN
Falling Edge of OE to Valid
Data
Data Valid Time
Aperture Jitter
Full Scale Step Response
1 k
to V
CC
25
ns
t
VALID
t
AJ
27
<
30
1
ns
ps
t
r
= 10 ns
V
IN
Step from
(V
REF
+ +100 mV) to
(V
REF
)
conversion
Overrange Recovery Time
1
conversion
t
WU
PD Low to
1
2
LSB Accurate
Conversion (Wake-Up Time)
700
ns
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-
tional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed speci-
fications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 2:
All voltages are measured with respect to GND = AGND = DGND = 0V, unless otherwise specified.
Note 3:
When the input voltage at any pin exceeds the power supplies (V
<
GND or V
>
V
or V
), the current at that pin should be limited to 25 mA. The 50 mA
maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 25 mA to two.
Note 4:
The absolute maximum junction temperature (T
max) for this device is 150C. The maximum allowable power dissipation is dictated by T
max, the
junction-to-ambient thermal resistance (
θ
), and the ambient temperature (T
), and can be calculated using the formula P
MAX = (T
max T
)/
θ
. In the 32-pin
TQFP,
θ
is 69C/W, so P
MAX = 1,811 mW at 25C and 942 mW at the maximum operating ambient temperature of 85C. Note that the power dissipation of this
device under normal operation will typically be about 137 mW (125 mW quiescent power + 2 mW reference ladder power +10 mW due to 1 TTL load on each digital
output). The values for maximum power dissipation listed above will be reached only when the ADC10030 is operated in a severe fault condition (e.g. when input or
output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5:
Human body model is 100 pF capacitor discharged through a 1.5 k
resistor. Machine model is 220 pF discharged through ZERO
.
Note 6:
See AN450, “Surface Mounting Methods and Their Effect on Product Reliability”, or the section entitled “Surface Mount” found in any post 1986 National
Semiconductor Linear Data Book, for other methods of soldering surface mount devices.
Note 7:
The inputs are protected as shown below. Input voltage magnitudes up to 300 mV beyond the supply rails will not damage this device. However, errors in
the A/D conversion can occur if the input goes above V
A
or below AGND by more than 300 mV.
A
www.national.com
7
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