参数资料
| 型号： | ADCMP561BRQ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 4/16页 |
| 文件大小： | 0K |
| 描述： | IC COMP PECL DUAL HS 16-QSOP |
| 产品变化通告： | Product Discontinuation 05/Apr/2012 |
| 标准包装： | 98 |
| 类型： | 带锁销 |
| 元件数： | 2 |
| 输出类型： | 补充型，差分，开路发射极，PECL |
| 电压 - 电源，单路/双路(±)： | ±4.75 V ~ 5.25 V |
| 电压 - 输入偏移（最小值）： | 2mV @ -5.2V，5V |
| 电流 - 输入偏压（最小值）： | 3µA @ -5.2V，5V |
| 电流 - 输出（标准）： | 30mA |
| 电流 - 静态（最大值）： | 5mA，28mA，13mA |
| CMRR, PSRR（标准）： | 80dB CMRR，85dB PSRR |
| 传输延迟（最大）： | 0.83ns |
| 磁滞： | ±1mV |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 安装类型： | 表面贴装 |
| 包装： | 管件 |
| 配用： | EVAL-ADCMP561BRQZ-ND - BOARD EVALUATION ADCMP561BRQZ |
ADCMP561/ADCMP562
Rev. A | Page 12 of 16
Propagation delay dispersion is a specification that is important
in critical timing applications such as ATE, bench instruments,
and nuclear instrumentation. Overdrive dispersion is defined
as the variation in propagation delay as the input overdrive
conditions are changed (Figure 19). For the ADCMP561 and
ADCMP562, overdrive dispersion is typically 75 ps as the
overdrive is changed from 100 mV to 1.5 V. This specification
applies for both positive and negative overdrive because the
ADCMP561/ADCMP562 have equal delays for positive and
negative going inputs.
Q OUTPUT
INPUT VOLTAGE
1.5V OVERDRIVE
20mV OVERDRIVE
DISPERSION
VREF ± VOS
04687-0-005
Figure 19. Propagation Delay Dispersion
COMPARATOR HYSTERESIS
The addition of hysteresis to a comparator is often useful in a
noisy environment, or where it is not desirable for the
comparator to toggle between states when the input signal is at
the switching threshold. The transfer function for a comparator
with hysteresis is shown in Figure 20. If the input voltage
approaches the threshold from the negative direction, the
comparator switches from a 0 to a 1 when the input crosses
+VH/2. The new switching threshold becomes VH/2. The
comparator remains in a 1 state until the threshold VH/2 is
crossed, coming from the positive direction. In this manner,
noise centered on 0 V input does not cause the comparator to
switch states unless it exceeds the region bounded by ±VH/2.
Positive feedback from the output to the input is often used to
produce hysteresis in a comparator (Figure 24). The major
problem with this approach is that the amount of hysteresis
varies with the output logic levels, resulting in a hysteresis that
is not symmetrical around zero.
In the ADCMP562, hysteresis is generated through the
programmable hysteresis pin. A resistor from the HYS pin to
GND creates a current into the part that is used to generate
hysteresis. Hysteresis generated in this manner is independent
of output swing and is symmetrical around the trip point. The
hysteresis versus resistance curve is shown in Figure 21.
A current source can also be used with the HYS pin. The
relationship between the current applied to the HYS pin and the
resulting hysteresis is shown in Figure 17.
OUTPUT
INPUT
0
1
0V
–VH
2
+VH
2
04687-0-006
Figure 20. Comparator Hysteresis Transfer Function
160
140
120
100
80
60
40
20
0
10
20
30
40
50
04687-0-021
RHYS (k)
PR
OGR
A
M
E
D
H
YSTER
ESIS
(
m
V)
Figure 21. Comparator Hysteresis vs. RHYS
MINIMUM INPUT SLEW RATE REQUIREMENT
As for all high speed comparators, a minimum slew rate must
be met to ensure that the device does not oscillate when the
input crosses the threshold. This oscillation is due in part to the
high input bandwidth of the comparator and the parasitics of
the package. Analog Devices recommends a slew rate of 1 V/s
or faster to ensure a clean output transition. If slew rates less
than 1 V/s are used, hysteresis should be added to reduce the
oscillation.
相关PDF资料 |
PDF描述 |
|---|---|
| ADCMP563BRQ | IC COMPARATOR ECL DUAL 16QSOP |
| ADCMP565BP | IC COMP DUAL ULTRA-FAST 20-PLCC |
| ADCMP566BCPZ | IC COMP DUAL ULTRA-FAST 32LFCSP |
| ADCMP567BCPZ | IC COMP DUAL ULTRA-FAST 32LFCSP |
| ADCMP573BCPZ-WP | IC COMPARATOR PECL 3.3-5 16LFCSP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADCMP561BRQZ | 功能描述:IC COMPARATOR PECL DUAL 16QSOP RoHS:是 类别:集成电路 (IC) >> 线性 - 比较器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 类型:带电压基准 元件数:4 输出类型:开路漏极 电压 - 电源，单路/双路(±):2.5 V ~ 11 V，±1.25 V ~ 5.5 V 电压 - 输入偏移（最小值）:10mV @ 5V 电流 - 输入偏压（最小值）:- 电流 - 输出（标准）:0.015mA @ 5V 电流 - 静态（最大值）:8.5µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:- 磁滞:- 工作温度:0°C ~ 70°C 封装/外壳:16-SOIC（0.154"，3.90mm 宽） 安装类型:表面贴装 包装:管件 产品目录页面:1386 (CN2011-ZH PDF) |
| ADCMP562 | 制造商:AD 制造商全称:Analog Devices 功能描述:Dual High Speed PECL Comparators |
| ADCMP562BRQ | 功能描述:IC COMPARATOR PECL DUAL 20QSOP RoHS:否 类别:集成电路 (IC) >> 线性 - 比较器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
| ADCMP562BRQZ | 功能描述:IC COMPARATOR PECL DUAL 20-QSOP RoHS:是 类别:集成电路 (IC) >> 线性 - 比较器 系列:- 标准包装:1 系列:- 类型:通用 元件数:1 输出类型:CMOS，开路集电极，TTL 电压 - 电源，单路/双路(±):2.7 V ~ 5.5 V 电压 - 输入偏移（最小值）:7mV @ 5V 电流 - 输入偏压（最小值）:0.25µA @ 5V 电流 - 输出（标准）:84mA @ 5V 电流 - 静态（最大值）:120µA CMRR, PSRR（标准）:- 传输延迟（最大）:600ns 磁滞:- 工作温度:-40°C ~ 85°C 封装/外壳:SC-74A，SOT-753 安装类型:表面贴装 包装:剪切带 (CT) 产品目录页面:1268 (CN2011-ZH PDF) 其它名称:*LMV331M5*LMV331M5/NOPBLMV331M5CT |
| ADCMP562BRQZ-RL7 | 功能描述:IC COMPARATOR PECL DUAL 20QSOP RoHS:是 类别:集成电路 (IC) >> 线性 - 比较器 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
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