参数资料
型号: ADCMP563BRQ
厂商: Analog Devices Inc
文件页数: 2/16页
文件大小: 0K
描述: IC COMPARATOR ECL DUAL 16QSOP
产品变化通告: Product Discontinuation 05/Apr/2012
标准包装: 98
类型: 带锁销
元件数: 2
输出类型: 补充型,差分,ECL,开路发射极
电压 - 电源,单路/双路(±): ±4.75 V ~ 5.25 V
电压 - 输入偏移(最小值): 2mV @ -5.2V,5V
电流 - 输入偏压(最小值): 3µA @ -5.2V,5V
电流 - 输出(标准): 30mA
电流 - 静态(最大值): 5mA,25mA
CMRR, PSRR(标准): 80dB CMRR,85dB PSRR
传输延迟(最大): 0.83ns
磁滞: ±1mV
工作温度: -40°C ~ 85°C
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
安装类型: 表面贴装
包装: 管件
配用: EVAL-ADCMP563BRQZ-ND - BOARD EVALUATION ADCMP563BRQZ
ADCMP563/ADCMP564
Rev. C | Page 10 of 16
TIMING INFORMATION
50%
VREF ± VOS
50%
DIFFERENTIAL
INPUT VOLTAGE
LATCH ENABLE
Q OUTPUT
LATCH ENABLE
tH
tPDL
tPDH
tPLOH
tPLOL
tR
tF
VIN
VOD
tS
tPL
04650-0-003
Figure 20. System Timing Diagram
Figure 20 shows the compare and latch features of the ADCMP563. Table 4 describes the terms in the diagram.
Table 4. Timing Descriptions
Symbol
Timing
Description
tPDH
Input-to-Output High Delay
Propagation delay measured from the time the input signal crosses the reference (± the
input offset voltage) to the 50% point of an output low-to-high transition.
tPDL
Input-to-Output Low Delay
Propagation delay measured from the time the input signal crosses the reference (± the
input offset voltage) to the 50% point of an output high-to-low transition.
tPLOH
Latch Enable to Output High Delay
Propagation delay measured from the 50% point of the latch enable signal low-to-high
transition to the 50% point of an output low-to-high transition.
tPLOL
Latch Enable to Output Low Delay
Propagation delay measured from the 50% point of the latch enable signal low-to-high
transition to the 50% point of an output high-to-low transition.
tH
Minimum Hold Time
Minimum time after the negative transition of the latch enable signal that the input signal
must remain unchanged to be acquired and held at the outputs.
tPL
Minimum Latch Enable Pulse Width
Minimum time the latch enable signal must be high to acquire an input signal change.
tS
Minimum Setup Time
Minimum time before the negative transition of the latch enable signal that an input
signal change must be present to be acquired and held at the outputs.
tR
Output Rise Time
Amount of time required to transition from a low to a high output as measured at the
20% and 80% points.
tF
Output Fall Time
Amount of time required to transition from a high to a low output as measured at the
20% and 80% points.
VOD
Voltage Overdrive
Difference between the differential input and reference input voltages.
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