参数资料
型号: ADE7169ASTZF16
厂商: Analog Devices Inc
文件页数: 134/152页
文件大小: 0K
描述: IC ENERGY METER 1PHASE 64LQFP
标准包装: 1
输入阻抗: *
测量误差: *
电压 - 高输入/输出: *
电压 - 低输入/输出: *
电流 - 电源: *
电源电压: *
测量仪表类型: *
工作温度: *
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-LQFP(10x10)
包装: 托盘
产品目录页面: 797 (CN2011-ZH PDF)
配用: EVAL-ADE7169EBZ-2-ND - BOARD EVALUATION FOR ADE7169F16
ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
Table 148. SPI Configuration SFR 1 (SPIMOD1, Address 0xE8)
Bit
[7:6]
Address
0xEF to
Mnemonic
Reserved
Default
0
Description
Reserved.
0xEE
5
0xED
INTMOD
0
SPI interrupt mode.
INTMOD
0
1
Result
SPI interrupt is set when the SPI Rx buffer is full.
SPI interrupt is set when the SPI Tx buffer is empty.
4
0xEC
AUTO_SS
1
Master mode, SS output control (see Figure 110 ).
AUTO_SS
0
1
Result
The SS pin is held low while this bit is cleared. This allows manual chip select
control using the SS pin.
Single byte read or write. The SS pin goes low during a single byte
transmission and then returns high.
Continuous Transfer. The SS pin goes low during the duration of the multibyte
continuous transfer and then returns high.
3
0xEB
SS_EN
0
Slave mode, SS input enable.
When this bit is set to Logic 1, the SS pin is defined as the slave select input pin for the SPI
slave interface.
2
0xEA
RxOFW
0
Receive buffer overflow write enable.
RxOFW
0
1
Result
If the SPI2CRx SFR has not been read when a new data byte is received,
the new byte is discarded.
If the SPI2CRx SFR has not been read when a new data byte is received,
the new byte overwrites the old data.
[1:0]
0xE9 to
SPIR
0
Master mode, SPI SCLK frequency.
0xE8
SPIR
00
01
10
11
Result
f CORE /8 = 512 kHz (if f CORE = 4.096 MHz).
f CORE /16 = 256 kHz (if f CORE = 4.096 MHz).
f CORE /32 = 128 kHz (if f CORE = 4.096 MHz).
f CORE /64 = 64 kHz (if f CORE = 4.096 MHz).
Rev. B | Page 134 of 152
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