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参数资料
| 型号： | ADE7757ARNZRL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 10/16页 |
| 文件大小： | 0K |
| 描述： | IC ENERGY METERING 1PHASE 16SOIC |
| 标准包装： | 2,500 |
| 输入阻抗： | 320 千欧 |
| 测量误差： | 0.1% |
| 电压 - 高输入/输出： | 2.4V |
| 电压 - 低输入/输出： | 0.8V |
| 电流 - 电源： | 5mA |
| 电源电压： | 4.75 V ~ 5.25 V |
| 测量仪表类型： | 单相 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 带卷 (TR) |
ADE7757
Typical Connection Diagrams
Figure 7 shows a typical connection diagram for Channel V1. A
shunt is the current sensor selected for this example because of
its low cost compared to other current sensors such as the CT
(current transformer). This IC is ideal for low current meters.
V DD
5V
4V
R F
V1P
0V
SHUNT
30mV
C F
V1N
TIME
R F
C F
INTERNAL
ACTIVATION INACTIVE
ACTIVE
INACTIVE
AGND
PHASE
NEUTRAL
Figure 7. Typical Connection for Channel V1
Figure 8 shows a typical connection for Channel V2. Typically,
the ADE7757 is biased around the phase wire, and a resistor
divider is used to provide a voltage signal that is proportional to
the line voltage. Adjusting the ratio of R A , R B , and R F is also a
convenient way of carrying out a gain calibration on a meter.
Figure 9. On-Chip Power Supply Monitor
HPF and Offset Effects
Figure 10 illustrates the effect of offsets on the real power calcu-
lation. As can be seen, offsets on Channel V1 and Channel V2
will contribute a dc component after multiplication. Since this
dc component is extracted by the LPF and used to generate the
R A *
R B
V2P
real power information, the offsets will contribute a constant
error to the real power calculation. This problem is easily avoided
R F
C F
165mV V2N
R F
C F
by the built-in HPF in Channel V1. By removing the offsets
from at least one channel, no error component can be generated
at dc by the multiplication. Error terms at the line frequency ( )
are removed by the LPF and the digital-to-frequency conversion
(see Digital-to-Frequency Conversion section).
NEUTRAL PHASE
* R A >> R B + R F
The equation below shows how the power calculation is affected
+ V OS × I OS + V OS × I cos ( ω t ) + I OS × V cos ( ω t )
=
× cos ( 2 ω t )
+
Figure 8. Typical Connections for Channel V2
POWER SUPPLY MONITOR
The ADE7757 contains an on-chip power supply monitor. The
power supply (V DD ) is continuously monitored by the ADE7757.
If the supply is less than 4 V, the ADE7757 becomes inactive.
This is useful to ensure proper device operation at power-up
and power-down. The power supply monitor has built in hyster-
esis and filtering that provide a high degree of immunity to false
triggering from noisy supplies.
As can be seen from Figure 9, the trigger level is nominally set
by the dc offsets in the current and voltage channels.
{ V cos ( ω t ) + V OS } × { I cos ( ω t ) + I OS }
V × I
2
V × I
2
DC COMPONENT (INCLUDING ERROR TERM)
IS EXTRACTED BY THE LPF FOR REAL
POWER CALCULATION
at 4 V. The tolerance on this trigger level is within ± 5%. The
V OS
I OS
power supply and decoupling for the part should be such that
the ripple at V DD does not exceed 5 V ± 5% as specified for
normal operation.
V
2
I
I OS
V OS
V
I
0
FREQUENCY – RAD/s
Figure 10. Effect of Channel Offset on the Real
Power Calculation
–10 –
REV. A
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相关代理商/技术参数 |
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