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参数资料
| 型号： | ADF4113HVBRUZ-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 6/20页 |
| 文件大小： | 0K |
| 描述： | IC CHARGE PUMP HV SYNTH 16-TSSOP |
| 标准包装： | 2,500 |
| 类型： | 时钟/频率合成器，RF |
| PLL： | 是 |
| 输入： | CMOS，TTL |
| 输出： | 时钟 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 2:1 |
| 差分 - 输入:输出： | 是/无 |
| 频率 - 最大： | 4GHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 2.7 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 16-TSSOP |
| 包装： | 带卷 (TR) |
| 配用： | EVAL-ADF4113HVEB1Z-ND - BOARD EVALUATION FOR ADF4113HV EVAL-ADF4113EBZ2-ND - BOARD EVAL FOR ADF4113 1750MHZ EVAL-ADF4113EBZ1-ND - BOARD EVAL FOR ADF4113 EVAL-ADF411XEBZ1-ND - BOARD EVAL FOR ADF411X NO CHIP |
ADF4113HV
Data Sheet
Rev. B | Page 14 of 20
DEVICE PROGRAMMING AFTER INITIAL
POWER-UP
After initial power-up of the device, there are two ways to
program the device.
CE Pin Method
1. Apply VDD.
2. Bring CE low to put the device into power-down. This is an
asynchronous power-down in that it happens immediately.
3. Program the function latch (10). Program the R counter
latch (00). Program the AB counter latch (01).
4. Bring CE high to take the device out of power-down. The R
and AB counters resume counting in close alignment.
After CE goes high, a duration of 1 s is sometimes required for
the prescaler band gap voltage and oscillator input buffer bias to
reach steady state.
CE can be used to power the device up and down to check for
channel activity. The input register does not need to be repro-
grammed each time the device is disabled and enabled as long
as it has been programmed at least once after VDD was initially
applied.
Counter Reset Method
1. Apply VDD.
2. Conduct a function latch load (10 in 2 LSBs). As part of
this, load 1 to the F1 bit. This enables the counter reset.
3. Conduct an R counter load (00 in 2 LSBs).
4. Conduct an AB counter load (01 in 2 LSBs).
5. Conduct a function latch load (10 in 2 LSBs). As part of
this, load 0 to the F1 bit. This disables the counter reset.
This sequence provides the same close alignment as the initiali-
zation method. It offers direct control over the internal reset.
Note that counter reset holds the counters at load point and
three-states the charge pump, but does not trigger synchronous
power-down.
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| ADF4113HVBCPZ-RL | IC CHARGE PUMP HV SYNTH 20-LFCSP |
| VE-242-IV | CONVERTER MOD DC/DC 15V 150W |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADF4113HVBRUZ-RL7 | 功能描述:IC CHARGE PUMP HV SYNTH 16-TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:Precision Edge® 类型:时钟/频率合成器 PLL:无 输入:CML，PECL 输出:CML 电路数:1 比率 - 输入:输出:2:1 差分 - 输入:输出:是/是 频率 - 最大:10.7GHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-VFQFN 裸露焊盘，16-MLF? 供应商设备封装:16-MLF?（3x3） 包装:带卷 (TR) 其它名称:SY58052UMGTRSY58052UMGTR-ND |
| ADF4113HVSD1Z | 制造商:Analog Devices 功能描述:- Rail/Tube |
| ADF4116 | 制造商:AD 制造商全称:Analog Devices 功能描述:RF PLL Frequency Synthesizers |
| ADF4116_07 | 制造商:AD 制造商全称:Analog Devices 功能描述:RF PLL Frequency Synthesizers |
| ADF4116BCP | 制造商:AD 制造商全称:Analog Devices 功能描述:RF PLL Frequency Synthesizers |
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