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参数资料
| 型号： | ADF4153YRUZ-RL7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 15/24页 |
| 文件大小： | 0K |
| 描述： | IC SYNTH FRACT-N FREQ 16-TSSOP |
| 标准包装： | 1,000 |
| 类型： | 分数 N 合成器（RF） |
| PLL： | 是 |
| 输入： | CMOS，TTL |
| 输出： | 时钟 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 2:1 |
| 差分 - 输入:输出： | 是/无 |
| 频率 - 最大： | 4GHz |
| 除法器/乘法器： | 无/是 |
| 电源电压： | 2.7 V ~ 3.3 V |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 16-TSSOP |
| 包装： | 带卷 (TR) |
| 配用： | EVAL-ADF4153EBZ1-ND - BOARD EVAL FOR ADF4153 |
ADF4153
Data Sheet
Rev. F | Page 22 of 24
APPLICATIONS INFORMATION
LOCAL OSCILLATOR FOR A GSM BASE STATION
TRANSMITTER
Figure 20 shows the ADF4153 being used with a VCO to
produce the local oscillator (LO) for a GSM base station
transmitter.
The reference input signal is applied to the circuit at REFIN and,
in this case, is terminated in 50 . A 25 MHz reference is used,
which is fed directly to the PFD. To achieve 200 kHz channel
spacing, a modulus of 125 is necessary. Note that with a modulus
of 125, which is not divisible by 2, 3 or 6, subfractional spurs are
avoided. See the Spur Mechanisms section for more information.
The charge pump output of the ADF4153 drives the loop filter.
The charge pump current is ICP = 5 mA. ADIsimPLL is used to
calculate the loop filter. It is designed for a loop bandwidth of
20 kHz and a phase margin of 45 degrees.
The loop filter output drives the VCO, which in turn is fed back
to the RF input of the PLL synthesizer. It also drives the RF output
terminal. A T-circuit configuration provides 50 matching
between the VCO output, the RF output, and the RFIN terminal
of the synthesizer.
In a PLL system, it is important to know when the loop is in
lock. This is achieved by using the MUXOUT signal from the
synthesizer. The MUXOUT pin can be programmed to monitor
various internal signals in the synthesizer. One of these is the
lock detect signal.
VDD
VP
AVDD DVDD
ADF4153
VP
22nF
82
160
270nF
VCO190-902T
VCC
RFOUT
18
100pF
1000pF
51
5.1k
REFIN
SVDD
5
3
4
9
7
15
16
6
14
10
2
RSET
MUXOUT
LOCK
DETECT
100pF
CP
G
ND
DG
ND
AG
ND
RFINA
RFINB
CLK
DATA
LE
DECOUPLING CAPACITORS SHOULD BE PLACED
AS CLOSE AS POSSIBLE TO THE PINS.
CP
8
10
FREFIN
8.2nF
100nF
10F
100nF
10F
10pF
100nF
51
SPI
-C
O
M
PA
TIB
LE
S
E
R
IA
L
BUS
03685-
028
Figure 20. Local Oscillator for a GSM Base Station Transmitter
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADF4154 | 制造商:AD 制造商全称:Analog Devices 功能描述:Fractional-N Frequency Synthesizer |
| ADF4154BCP | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 20-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:FRACTIONAL-N SYNTH. W/FASTLOCK COUNTER - Bulk |
| ADF4154BCP-REEL | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 20-Pin LFCSP EP T/R 制造商:Rochester Electronics LLC 功能描述:FRACTIONAL-N SYNTH. W/FASTLOCK COUNTER - Tape and Reel |
| ADF4154BCP-REEL7 | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 20-Pin LFCSP EP T/R |
| ADF4154BCPZ | 功能描述:IC FRACTION-N FREQ SYNTH 20LFCSP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:Precision Edge® 类型:时钟/频率合成器 PLL:无 输入:CML，PECL 输出:CML 电路数:1 比率 - 输入:输出:2:1 差分 - 输入:输出:是/是 频率 - 最大:10.7GHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-VFQFN 裸露焊盘，16-MLF? 供应商设备封装:16-MLF?（3x3） 包装:带卷 (TR) 其它名称:SY58052UMGTRSY58052UMGTR-ND |
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