参数资料
| 型号： | ADF4218LBRUZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 24/24页 |
| 文件大小： | 0K |
| 描述： | IC PLL FREQ SYNTHESIZER 20TSSOP |
| 标准包装： | 75 |
| 类型： | 时钟/频率合成器（RF/IF） |
| PLL： | 是 |
| 输入： | CMOS，TTL |
| 输出： | 时钟 |
| 电路数： | 1 |
| 比率 - 输入:输出： | 3:1 |
| 差分 - 输入:输出： | 是/无 |
| 频率 - 最大： | 3GHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 2.6 V ~ 3.3 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 20-TSSOP |
| 包装： | 管件 |
REV. C
ADF4217L/ADF4218L/ADF4219L
–9–
CIRCUIT DESCRIPTION
Reference Input Section
The reference input stage is shown in Figure 2. SW1 and SW2
are normally closed switches; SW3 is normally open. When
power-down is initiated, SW3 is closed and SW1 and SW2 are
opened. This ensures that there is no loading of the REFIN pin
on power-down.
POWER-DOWN
CONTROL
REFIN NC
NC
NO
SW3
SW2
SW1
50k
BUFFER
TO R
COUNTER
NC = NORMALLY CLOSED
NO = NORMALLY OPEN
Figure 2. Reference Input Stage
IF/RF Input Stage
The IF/RF input stage is shown in Figure 3. It is followed by a
two-stage limiting amplifier to generate the CML clock levels
needed for the prescaler.
500
1.6V
BIAS
GENERATOR
RFINA
RFINB
AVDD
AGND
Figure 3. IF/RF Input Stage
Prescaler
The dual modulus prescaler (P/P + 1), along with the A and
B counters, enables the large division ratio, N, to be realized
(N = BP + A). This prescaler, operating at CML levels, takes
the clock from the IF/RF input stage and divides it down to a
manageable frequency for the CMOS A and B counters. It is
based on a synchronous 4/5 core.
The prescaler is selectable. On the IF side, it can be set to either 8/9
(DB20 of the IF AB Counter Latch set to 0) or 16/17 (DB20 set
to 1). On the RF side of the ADF4217L/ADF4218L, it can be set
to 64/65 or 32/33. On the ADF4219L, the RF prescaler can be
set to 16/17 or 32/33. See Tables V, VI, VIII, and IX.
A AND B COUNTERS
The A and B CMOS counters combine with the dual modulus
prescaler to allow a wide ranging division ratio in the PLL feed-
back counter. The devices are guaranteed to work when the
prescaler output is 188 MHz or less. Typically they will work
with 250 MHz output from the prescaler.
TO PFD
N = BP + A
LOAD
MODULUS
CONTROL
FROM IF/RF
INPUT STAGE
11(13)-BIT
B COUNTER
6(5)-BIT
A COUNTER
PRESCALER
P/P+1
Figure 4. Reference Input Stage, A and B Counters
VCP – V
6
0
–6
0
5.0
0.5
I CP
–
mA
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
4
2
–2
–4
VP = 5V
ICP = 4mA
TPC 13. Charge Pump Output Characteristics
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADF4218LBRUZ-REEL | 功能描述:IC PLL FREQ SYNTHESIZER 20TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:Precision Edge® 类型:时钟/频率合成器 PLL:无 输入:CML，PECL 输出:CML 电路数:1 比率 - 输入:输出:2:1 差分 - 输入:输出:是/是 频率 - 最大:10.7GHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-VFQFN 裸露焊盘，16-MLF? 供应商设备封装:16-MLF?（3x3） 包装:带卷 (TR) 其它名称:SY58052UMGTRSY58052UMGTR-ND |
| ADF4218LBRUZ-REEL7 | 功能描述:IC PLL FREQ SYNTHESIZER 20TSSOP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:Precision Edge® 类型:时钟/频率合成器 PLL:无 输入:CML，PECL 输出:CML 电路数:1 比率 - 输入:输出:2:1 差分 - 输入:输出:是/是 频率 - 最大:10.7GHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-VFQFN 裸露焊盘，16-MLF? 供应商设备封装:16-MLF?（3x3） 包装:带卷 (TR) 其它名称:SY58052UMGTRSY58052UMGTR-ND |
| ADF4219L | 制造商:未知厂家 制造商全称:未知厂家 功能描述:ADF4217L/18L/19L: Dual Low Power Frequency Synthesizers Data Sheet (Rev. B. 7/02) |
| ADF4219LBCC | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual Up to 188MHz 24-Pin LGA |
| ADF4219LBCC-REEL | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual Up to 188MHz 24-Pin LGA T/R |
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